ispPAC-POWR607-01N32I Lattice, ispPAC-POWR607-01N32I Datasheet - Page 9

• Manufacturer Part Number: ispPAC-POWR607-01N32I
• Description: Supervisory Circuits Prec. Prog. Pwr Sppl y Seq. Mon. I
• Manufacturer: Lattice

Specifications of ispPAC-POWR607-01N32I

• Number Of Voltages Monitored: 6
• Undervoltage Threshold: 0.8 V
• Output Type: Open Collector / Drain
• Manual Reset: Resettable
• Watchdog: Watchdog
• Power-up Reset Delay (typ): 300 us
• Supply Voltage (max): 3.96 V
• Supply Voltage (min): 2.64 V
• Supply Current (typ): 3.5 mA
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
Timing for JTAG Operations
Figure 4-4. Erase (User Erase or Erase All) Timing Diagram
Figure 4-5. Programming Timing Diagram
t
t
t
t
t
t
t
t
t
t
f
t
t
t
ISPEN
ISPDIS
HVDIS
HVDIS
CEN
CDIS
SU1
H
CKH
CKL
MAX
CO
PWV
PWP
Symbol
TMS
TCK
State
State
TCK
TMS
VIH
VIH
VIL
VIL
Program enable delay time
Program disable delay time
High voltage discharge time, program
High voltage discharge time, erase
Falling edge of TCK to TDO active
Falling edge of TCK to TDO disable
Setup time
Hold time
TCK clock pulse width, high
TCK clock pulse width, low
Maximum TCK clock frequency
Falling edge of TCK to valid output
Verify pulse width
Programming pulse width
VIH
VIH
VIL
VIL
Update-IR
Update-IR
t
SU1
t
SU1
t
CKH
t
H
Parameter
t
CKH
t
SU1
t
t
GKL
H
Run-Test/Idle (Erase)
t
SU1
t
CKL
Run-Test/Idle (Program)
t
H
t
H
t
SU1
t
PWP
Select-DR Scan
t
CKH
t
t
H
SU1
Conditions
4-9
t
Select-DR Scan
CKH
t
H
t
SU1
Min.
200
10
30
30
10
20
20
30
20
—
—
—
—
5
t
CKH
t
H
ispPAC-POWR607 Data Sheet
t
Run-Test/Idle (Discharge)
SU1
t
SU1
t
GKL
Typ.
t
Specified by the Data Sheet
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CKH
t
t
H
CKH
Update-IR
t
H
t
SU2
t
SU1
t
CKL
t
SU1
Max.
10
10
25
10
—
—
—
—
—
—
—
—
—
—
t
CKH
t
t
CKH
H
t
H
Units
MHz
ms
µs
µs
µs
µs
µs
ns
ns
ns
ns
ns
ns
ns