PDLXT310NE.D4 Intel, PDLXT310NE.D4 Datasheet - Page 15

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PDLXT310NE.D4

Manufacturer Part Number
PDLXT310NE.D4
Description
Manufacturer
Intel
Datasheet

Specifications of PDLXT310NE.D4

Number Of Line Interfaces
1
Lead Free Status / Rohs Status
Not Compliant
3.0
3.1
Datasheet
Crystal
(6.176 MHz)
1. The customer should always verify the specifications of the quartz crystal against Intel’s recommended specification point-
Component
by-point to make certain that the crystal suits the desired application.
Table 4. LATN Output Coding
Figure 6. Typical LATN Decoding Circuit
Table 5. Approved Crystals and Transformers
Application Information
LATN Decoding Circuits and External Components
To conserve pins, the line attenuation output is encoded as a simple serial bit stream.
provides the decoded output for each equalizer setting.
LATN output. It uses a 2-bit synchronous counter (half of a 4-bit counter) with synchronous reset,
and a pair of flip-flops.
M-Tron
Monitor Products
CTS Knights
Valpey Fisher
U.S. Crystal
L1
0
0
1
1
1
L2
0
1
0
1
Manufacturer
Table 5
LATN
RCLK
lists approved crystals and transformers.
Line Attenuation
Vcc
L1
-15.0 dB
-22.5 dB
-7.5 dB
0.0 dB
CI
Q
R
CO
Q
D
MP-1 3808-010 / 4144-002
MSC1311-01B
6176-180
VF49A16FN1
U18-18-6176SP
T1 CSU/ISDN PRI Transceiver — LXT310
Figure 6
L2
CI
Q
is a typical decoding circuit for the
R
CO
Q
D
Part Numbers
Table 4
15

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