PSB21383H-V13TR Infineon Technologies, PSB21383H-V13TR Datasheet - Page 234

PSB21383H-V13TR

Manufacturer Part Number
PSB21383H-V13TR
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21383H-V13TR

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
Data Sheet
ATT2R
ATT1R
0: Attenuation value for the conferences loop is 0 dB
1: Attenuation value for the conferences loop loaded from CRAM
7.4.2
Value after reset: 00
PFCR
GX
0: Gain set to 0 dB
1: Gain coefficients loaded from CRAM
GR
0: Gain set to 0 dB
1: Gain coefficients loaded from CRAM
GZ
0: Gain set to
1: Gain coefficients loaded from CRAM
FX
0: Filter is bypassed
1: Filter coefficients loaded from CRAM
PGZ
0: Tap of the sidetone signal is before the AGC/GHX stage
1: Tap of the sidetone signal is after the AGC/GHX stage
FR
0: Filter is bypassed
1: Filter coefficients loaded from CRAM
DHPR
0: Filter enabled
1: Filter disabled
7
Programmable Filter Configuration Register (PFCR)
GX
... Attenuation of the Receive Channel related to Transmit Channel 2
... Attenuation of the Receive Channel related to Transmit Channel 1
... Transmit Gain
... Receive Gain
... Sidetone Gain
... Transmit Frequency Correction Filter
... Position Sidetone Gain
... Receive Frequency Correction Filter
... Disable High-Pass Receive (50/60 Hz filter)
dB
GR
H
GZ
FX
PGZ
224
FR
Detailed Register Description
DHPR DHPX
0
PSB 21381/2
PSB 21383/4
RD/WR (61
2001-03-12
H
)

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