PSB21383HV13XP Infineon Technologies, PSB21383HV13XP Datasheet - Page 228

• Manufacturer Part Number: PSB21383HV13XP
• Manufacturer: Infineon Technologies

Specifications of PSB21383HV13XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Data Sheet
7.3.12
Value after reset: 00
ASTI
ACKxy
After a STIxy interrupt the microcontroller has to acknowledge the interrupt by setting the
corresponding ACKxy bit.
0: No activity is initiated
1: Sets the acknowledge bit ACKxy for a STIxy interrupt
7.3.13
Value after reset: FF
MSTI
For the MSTI register following logical states are applied:
0: Interrupt is not masked
1: Interrupt is masked
STOVxy
By masking the STOV bits the number and time of the STOV interrupts for a certain
enabled STIxy interrupt can be controlled. For an enabled STIxy the own STOVxy is
generated when the STOVxy is enabled (MSTI.STIxy and MSTI.STOVxy = ’0’).
Additionally all other STOV interrupts of which the corresponding STI is disabled
(MSTI.STI = ’1’ and MSTI.STOV = ’0’) are generated.
STIxy
The STIxy interrupts can be masked by setting the corresponding mask bit to ’1’. For a
masked STIxy no STOV interrupt is generated.
ASTI - Acknowledge Synchronous Transfer Interrupt
MSTI - Mask Synchronous Transfer Interrupt
STOV
7
7
21
0
... Acknowledge Synchronous Transfer Interrupt
... Synchronous Transfer Overflow for STIxy
... Synchronous Transfer Interrupt xy
STOV
H
H
20
0
STOV
11
0
STOV
10
0
218
ACK
STI
21
21
ACK
STI
20
20
Detailed Register Description
ACK
STI
11
11
0
0
ACK
STI
10
10
PSB 21381/2
PSB 21383/4
RD/WR (59
2001-03-12
WR (58
H
H
)
)