SI5100-F-BC Silicon Laboratories Inc, SI5100-F-BC Datasheet - Page 26

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SI5100-F-BC

Manufacturer Part Number
SI5100-F-BC
Description
IC TXRX SERIAL/DESERIAL 195CBGA
Manufacturer
Silicon Laboratories Inc
Type
Transceiverr
Series
SiPHY®r
Datasheets

Specifications of SI5100-F-BC

Package / Case
196-BGA
Number Of Drivers/receivers
1/1
Protocol
SONET/SDH
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Product
RF / Wireless
Supply Voltage (max)
1.89 V, 3.47 V
Supply Voltage (min)
1.71 V
Supply Current
0.83 A
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 20 C
Mounting Style
SMD/SMT
Maximum Power Dissipation
1600 mW
Number Of Channels
1
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
336-1135
SI5100-BC

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5100-F-BC
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Si5100
17. Pin Descriptions: Si5100
Alphabetically listed by name
26
D5–11, E4, E11,
K11, K2, L5–11,
Pin Number(s)
E2, F11, F1–2,
B1, C1–2, D2,
G11, G2, H11,
H2, J11, J1–4,
L2, M1–4
M10
H12
F12
M7
M6
G3
K3
C3
FIFOERR
FIFORST
BWSEL1
BWSEL0
LOSLVL
Name
DLBK
LLBK
GND
LOS
GND
I/O
O
O
I
I
I
I
I
Signal Level
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
Rev. 1.1
Transmit DSPLL Bandwidth Select.
The inputs select loop bandwidth of the Transmit
Clock Multiplier DSPLL as listed in Table 6.
Note: Both inputs have an internal pulldown.
Diagnostic Loopback.
When this input is low, the transmit clock and
data are looped back for output on RXDOUT,
RXCLK1 and RXCLK2. This pin should be held
high for normal operation.
Note: This input has an internal pullup.
FIFO Error.
This output is asserted (driven low) when a FIFO
overflow/underflow has occurred. This output is
low until reset by asserting FIFORST.
FIFO RESET.
When this input is low, the read/write FIFO point-
ers are reset to their initial state.
Note: This input has an internal pullup.
Supply Ground.
Connect to system GND. Ensure a very low
impedance path for optimal performance.
Line Loopback.
When this input is low, the recovered clock and
data are looped back for output on TXDOUT,
and TXCLKOUT. Set this pin high for normal
operation.
Note: This input has an internal pullup.
Loss-of-Signal.
This output is asserted (driven low) when the
peak-to-peak signal amplitude on RXDIN is
below the threshold set via LOSLVL.
LOS Threshold Level.
Applying an analog voltage to this pin allows
adjustment of the Threshold used to declare
LOS. Tieing this input to VREF disables LOS
detection and forces the LOS output high.
Description

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