Z8623012PSG Zilog, Z8623012PSG Datasheet - Page 31

• Manufacturer Part Number: Z8623012PSG
• Description: IC SMART V-CHIP W/2ND I2C 18-DIP
• Manufacturer: Zilog
• Type: Video Decoderr

Specifications of Z8623012PSG

• Applications: Set-Top Boxes, TV
• Voltage - Supply, Digital: 4.75 V ~ 5.25 V
• Mounting Type: Through Hole
• Package / Case: 18-DIP (0.300", 7.62mm)
• Processor Series: Z8623x
• Core: Z80
• Data Bus Width: 8 bit
• Program Memory Type: CMOS
• Maximum Clock Frequency: 12 MHz
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply, Analog: -
• Lead Free Status / Rohs Status: Details

6.1.10 Content Advisory Ratings Select Register 4
6.1.11 Content Advisory Register 1
PS000401-TVC0699
R
This register holds the TV Parental Guidelines (L and D Content) Content Advi-
sory selections made by the viewer.
T
D
gram is TV-PG-D-rated according to the TV Parental Guidelines Ratings stan-
dards, and this bit is set to High.
D
gram is TV-14-D-rated according to the TV Parental Guidelines Ratings stan-
dards, and this bit is set to High.
D
D
gram is TV-PG-L-rated according to the TV Parental Guidelines Ratings stan-
dards, and this bit is set to High.
D
gram is TV-14-L-rated according to the TV Parental Guidelines Ratings stan-
dards, and this bit is set to High.
D
gram is TV-MA-L-rated according to the TV Parental Guidelines Ratings stan-
dards, and this bit is set to High.
D
N
video program possesses the corresponding TV Parental Guidelines Rating. The device
outputs High onto pin 13 only when a bit is set to High and it recovers the corresponding
TV Parental Guidelines Rating in the incoming video program. This control register is for
the D- and L-rated programs in TV Parental Guidelines Rating.
T
Bit
R/W
Bit
R/W
EGISTERS
ABLE
ABLE
0
1
2
4
5
6
7
OTE
-TV-PG-D.
-TV-14-D.
-D
-TV-PG-L.
-TV-14-L.
-TV-MA-L.
-Res.
:
3
.
The Z86230 outputs Low when a bit in this register is set to Low and the incoming
21. C
22. C
Reserved. These bits must kept Low(0).
Reserved. This bit must be kept Low(0).
S
UMMARY
ONTENT
ONTENT
The Z86230 outputs High on pin 13 when the incoming video pro-
The Z86230 outputs High on pin 13 when the incoming video pro-
The Z86230 outputs High on pin 13 when the incoming video pro-
res
The Z86230 outputs High on pin 13 when the incoming video pro-
The Z86230 outputs High on pin 13 when the incoming video pro-
R
7
Z86230—PRELIMINARY
B
R
7
TV-MA-
A
A
R/W
DVISORY
DVISORY
6
L
R
6
1
TV-14-
R/W
R
R
5
L
ATINGS
EGISTER
D
R
5
TV-PG-
R/W
S
1 (A
4
L
ELECT
a1
R
4
DDRESS
R
res
EGISTER
R
3
a0
R
3
= 0Ch)
4 (A
res
R
2
r2
R
2
C
DDRESS
ONTROL
TV-14-
R/W
D
1
r1
R
1
= 0Bh)
R
EGISTERS
TV-PG-
R/W
D
r0
0
R
0
31