MCP23018-E/MJ Microchip Technology, MCP23018-E/MJ Datasheet - Page 7

IC I/O EXPANDER I2C 16B 24QFN

MCP23018-E/MJ

Manufacturer Part Number
MCP23018-E/MJ
Description
IC I/O EXPANDER I2C 16B 24QFN
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP23018-E/MJ

Package / Case
24-QFN
Interface
I²C
Number Of I /o
16
Interrupt Output
Yes
Frequency - Clock
3.4MHz
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
MCP23018
Propagation Delay Time
50 ns
Operating Supply Voltage
1.8 V to 5.5 V
Power Dissipation
700 mW
Operating Temperature Range
- 40 C to + 125 C
Input Voltage
1.8 V to 5.5 V
Logic Type
I/O Expander
Maximum Clock Frequency
10 MHz
Maximum Operating Frequency
3.4 MHz
Mounting Style
SMD/SMT
Output Current
25 mA
Output Voltage
1.8 V to 4.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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0
1.2
The on-chip POR circuit holds the device in reset until
V
the POR circuit (i.e., release the device from reset).
The maximum V
electrical specification section.
When the device exits the POR condition (releases
reset), device operating parameters (i.e., voltage,
temperature, serial bus frequency, etc.) must be met to
ensure proper operation.
1.3
This block handles the functionality of the I
(MCP23018) or SPI (MCP23S18) interface protocol.
The MCP23X18 contains twenty two (22) individual
registers (eleven [11] register pairs) which can be
addressed through the Serial Interface block
1).
TABLE 1-1:
1.3.1
The MCP23X18 has the ability to operate in “Byte
Mode” or “Sequential Mode” (IOCON.SEQOP). Byte
mode and sequential mode are not to be confused with
I
© 2008 Microchip Technology Inc.
2
IOCON.BANK = 1
DD
C byte operations and sequential operations. The
has reached a high enough voltage to deactivate
Address
0Ah
1Ah
00h
10h
01h
02h
12h
03h
13h
04h
14h
05h
15h
06h
16h
07h
17h
08h
18h
09h
19h
11h
Power-on Reset (POR)
Serial Interface
BYTE MODE AND SEQUENTIAL
MODE
REGISTER ADDRESSES
DD
IOCON.BANK = 0
rise time is specified in the
Address
0Ch
0Dh
00h
02h
04h
06h
08h
0Ah
0Bh
0Eh
0Fh
10h
12h
01h
03h
05h
07h
09h
11h
13h
14h
15h
IPOLA
GPINTENA
DEFVALA
INTCONA
INTCAPA
GPIOA
IODIRA
IODIRB
IPOLB
GPINTENB
DEFVALB
INTCONB
IOCON
IOCON
GPPUA
GPPUB
INTFA
INTFB
INTCAPB
GPIOB
OLATA
OLATB
Access to:
(Table 1-
2
C
MCP23018/MCP23S18
modes explained here relate to the device’s internal
address pointer and whether or not it is incremented
after each byte is clocked on the serial interface.
Byte Mode disables automatic address pointer incre-
menting.
MCP23X18 does not increment its internal address
counter after each byte during the data transfer. This
gives the ability to continually access the same address
by providing extra clocks (without additional control
bytes). This is useful for polling the GPIO register for
data changes or for continually writing to the output
latches.
A special mode (Byte Mode with IOCON.BANK = 0)
causes the address pointer to toggle between associ-
ated A/B register pairs. For example, if the BANK bit is
cleared and the address pointer is initially set to
address 12h (GPIOA) or 13h (GPIOB), the pointer will
toggle between GPIOA and GPIOB. Note, the address
pointer can initially point to either address in the regis-
ter pair.
Sequential Mode enables automatic address pointer
incrementing. When operating in Sequential Mode, the
MCP23X18 increments its address counter after each
byte during the data transfer. The address pointer auto-
matically rolls over to address 00h after accessing the
last register.
These two modes are not to be confused with single
writes/reads and continuous writes/reads which are
serial protocol sequences. For example, the device
may be configured for Byte Mode and the master may
perform a continuous read. In this case, the
MCP23X18 would not increment the address pointer
and would repeatedly drive data from the same loca-
tion.
1.3.2
1.3.2.1
The I
register address sequence, as shown in the bottom of
Figure
data from the master and an Acknowledge (ACK) from
the MCP23018. The operation is ended with a stop (P)
or restart (SR) condition being generated by the mas-
ter.
Data is written to the MCP23018 after every byte trans-
fer. If a stop or restart condition is generated during a
data transfer, the data will not be written to the
MCP23018.
Both “byte mode” and “sequential mode” are supported
by the MCP23018. If sequential mode is enabled
(default), the MCP23018 increments its address
counter after each ACK during the data transfer.
2
C write operation includes the control byte and
1-1. This sequence is followed by eight bits of
When
I
2
C INTERFACE
I
2
C Write Operation
operating
in
Byte
DS22103A-page 7
Mode,
the

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