AD9949KCP Analog Devices Inc, AD9949KCP Datasheet - Page 27

• Manufacturer Part Number: AD9949KCP
• Description: IC CCD SIGNAL PROCESSOR 40-LFCSP
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 12-Bitr

Specifications of AD9949KCP

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 40-LFCSP
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 36MSPS
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 40
• Package Type: LFCSP EP
• Number Of Channels: 1
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant

The same Bayer pattern can also be interlaced, and the
interlaced mode should be used with this type of CCD (see
Figure 31). The color steering performs the proper multiplexing
of the R, G, and B gain values (loaded into the PxGA gain
registers) and is synchronized by the user with vertical (VD)
and horizontal (HD) sync pulses. For timing information,
see Figure 34.
CDS
CCD: INTERLACED BAYER
EVEN FIELD
ODD FIELD
CCD: PROGRESSIVE BAYER
SHP/SHD
Gb
Gb
Gb
Gb
Gb
Gb
R
R
R
R
R
R
Figure 31. CCD Color Filter Example—Interlaced Readout
Figure 30. CCD Color Filter Example—Progressive Scan
VD
HD
Gr
Gr
Gr
Gr
Gr
Gr
B
B
B
B
B
B
PxGA
8
Gb
Gb
Gb
Gb
Gb
Gb
R
R
R
R
R
R
STEERING
CONTROL
Gr
Gr
Gr
Gr
COLOR
Gr
Gr
B
B
B
B
B
B
Figure 29. PxGA Block Diagram
MUX
2
4:1
MUX
4:1
VGA
LINE0
LINE1
LINE2
LINE0
LINE1
LINE2
LINE0
LINE1
LINE2
COLOR STEERING MODE:
INTERLACED
3
GAIN0
GAIN1
GAIN2
GAIN3
COLOR STEERING MODE:
PROGRESSIVE
GAIN0, GAIN1, GAIN0, GAIN1, ...
GAIN0, GAIN1, GAIN0, GAIN1, ...
GAIN0, GAIN1, GAIN0, GAIN1, ...
GAIN2, GAIN3, GAIN2, GAIN3, ...
GAIN2, GAIN3, GAIN2, GAIN3, ...
GAIN2, GAIN3, GAIN2, GAIN3, ...
GAIN0, GAIN1, GAIN0, GAIN1, ...
GAIN2, GAIN3, GAIN2, GAIN3, ...
GAIN0, GAIN1, GAIN0, GAIN1, ...
PxGA STEERING
SELECTION
PxGA GAIN
REGISTERS
MODE
CONTROL
REGISTER
BITS D0 TO D1
Rev. B | Page 27 of 36
A third type of readout uses the Bayer pattern divided into three
different readout fields. The 3-field mode should be used with
this type of CCD (see Figure 32). The color steering performs
the proper multiplexing of the R, G, and B gain values (loaded
into the PxGA gain registers) and is synchronized by the user
with vertical (VD) and horizontal (HD) sync pulses. For timing
information, see Figure 35.
CCD: 3-FIELD READOUT
FIRST FIELD
SECOND FIELD
THIRD FIELD
Gb
Gb
Gb
Gb
Gb
Gb
R
R
R
R
R
R
Figure 32. CCD Color Filter Example—Three-Field Readout
Gr
Gr
Gr
Gr
Gr
Gr
B
B
B
B
B
B
Gb
Gb
Gb
Gb
Gb
Gb
R
R
R
R
R
R
Gr
Gr
Gr
Gr
Gr
Gr
B
B
B
B
B
B
LINE0
LINE1
LINE2
LINE0
LINE1
LINE2
LINE0
LINE1
LINE2
COLOR STEERING MODE:
THREE FIELD
GAIN0, GAIN1, GAIN0, GAIN1, ...
GAIN2, GAIN3, GAIN2, GAIN3, ...
GAIN0, GAIN1, GAIN0, GAIN1, ...
GAIN2, GAIN3, GAIN2, GAIN3, ...
GAIN0, GAIN1, GAIN0, GAIN1, ...
GAIN2, GAIN3, GAIN2, GAIN3, ...
GAIN0, GAIN1, GAIN0, GAIN1, ...
GAIN2, GAIN3, GAIN2, GAIN3, ...
GAIN0, GAIN1, GAIN0, GAIN1, ...
AD9949