TJA1080ATS/2/T,118 NXP Semiconductors, TJA1080ATS/2/T,118 Datasheet - Page 25

• Manufacturer Part Number: TJA1080ATS/2/T,118
• Description: IC TXRX FLEXRAY 20-SSOP
• Manufacturer: NXP Semiconductors

Specifications of TJA1080ATS/2/T,118

• Package / Case: 20-SSOP
• Applications: Automotive
• Interface: FlexRay
• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Mounting Style: SMD/SMT
• Number Of Transmitters: 1
• Power Supply Requirement: Single
• Package Type: SSOP
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 20
• Operating Temperature (max): 150C
• Operating Temperature (min): -40C
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4813-2; 935288151118

NXP Semiconductors
Table 10.
TJA1080A
Product data sheet
Bit number Status bit
S0
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
Status bits
LOCAL WAKEUP
REMOTE WAKEUP
NODE CONFIG
PWON
BUS ERROR
TEMP HIGH
TEMP MEDIUM
TXEN_BGE CLAMPED
UVVBAT
UVVCC
UVVIO
STAR LOCKED
TRXD COLLISION
6.8 TRXD collision
6.9 Status register
A TRXD collision is detected when both TRXD lines are LOW for more than the TRXD
collision detection time (t
The status register can be read out on pin ERRN by using pin EN as clock; the status bits
are given in
The status register is accessible if:
After reading the status register, if no edge is detected on pin EN for longer than t
the status bits (S4 to S12) will be cleared if the corresponding flag has been reset. Pin
ERRN is LOW if the corresponding status bit is set.
•
•
UV
UV
VIO
VCC
flag is not set and the voltage on pin V
flag is not set and the voltage on pin V
Table
All information provided in this document is subject to legal disclaimers.
Description
local wake-up source flag is redirected to this bit
remote wake-up source flag is redirected to this bit
node configuration flag is redirected to this bit
status bit set means PWON flag has been set previously
status bit set means bus error flag has been set previously
status bit set means temperature high flag has been set previously
status bit set means temperature medium flag has been set previously
status bit set means TXEN_BGE clamped flag has been set previously
status bit set means UV
status bit set means UV
status bit set means UV
status bit is set if Star-locked mode has been entered previously
status bit is set if a TRXD collision has been detected previously
10. The timing diagram is illustrated in
Rev. 5 — 24 February 2011
det(col)(TRXD)
) in star configuration.
VBAT
VCC
VIO
flag has been set previously
flag has been set previously
flag has been set previously
IO
IO
is between 4.75 V and 5.25 V
is between 2.2 V and 4.75 V
Figure
11.
TJA1080A
FlexRay transceiver
© NXP B.V. 2011. All rights reserved.
det(EN)
25 of 49
,