TJA1080ATS/2/T,112 NXP Semiconductors, TJA1080ATS/2/T,112 Datasheet - Page 24

• Manufacturer Part Number: TJA1080ATS/2/T,112
• Description: IC TXRX FLEXRAY 20-SSOP
• Manufacturer: NXP Semiconductors

Specifications of TJA1080ATS/2/T,112

• Applications: Automotive
• Interface: Bus
• Voltage - Supply: 4.75 V ~ 5.25 V
• Package / Case: 20-SSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935288151112

NXP Semiconductors
TJA1080A
Product data sheet
6.7.10 UV
6.7.12 UV
6.7.13 Error flag
6.7.11 UV
6.7.7 Temperature high flag
6.7.8 TXEN_BGE clamped flag
6.7.9 Bus error flag
The temperature high flag is set if the junction temperature exceeds T
power mode while pin V
In node configuration the temperature high flag is reset if a negative edge is applied to pin
TXEN while the junction temperature is lower than T
pin V
by any activity detection (edge) while the junction temperature is lower than T
normal power mode while pin V
If the temperature high flag is set the transmitter is disabled and pins TRXD0 and TRXD1
are switched off.
The TXEN_BGE clamped flag is set if pin TXEN is LOW and pin BGE is HIGH for longer
than t
BGE is LOW. If the TXEN_BGE flag is set, the transmitter is disabled.
The bus error flag is set if pin TXEN is LOW and pin BGE is HIGH and the data received
from the bus lines (pins BP and BM) is different to that received on pin TXD. Additionally
in star configuration the bus error flag is also set if the data received on the bus lines is
different to that received on pins TRXD0 and TRXD1. The transmission of any valid
communication element, including a wake-up pattern, does not lead to bus error
indication.
The error flag is reset if the data on the bus lines (pins BP and BM) is the same as on pin
TXD or if the transmitter is disabled. No action will be taken if the bus error flag is set.
The UV
is reset if the voltage is higher than V
Section
The UV
t
than t
The UV
t
flag is set; see
The error flag is set if one of the status bits S4 to S12 is set. The error flag is reset if none
of the S4 to S12 status bits are set; see
det(uv)(VCC)
det(uv)(VIO)
VBAT
VCC
VIO
BAT
detCL(TXEN_BGE)
rec(uv)(VCC)
flag
VBAT
VCC
VIO
6.6.1.
flag
within its operating range. In star configuration, the temperature high flag is reset
flag
. The flag is reset if the voltage on pin V
. The flag is reset if the voltage on pin V
flag is set if the voltage on pin V
flag is set if the voltage on pin V
flag is set if the voltage on pin V
Section
All information provided in this document is subject to legal disclaimers.
or the wake flag is set; see
. The TXEN_BGE clamped flag is reset if pin TXEN is HIGH or pin
Rev. 5 — 24 February 2011
6.6.3.
BAT
is within its operating range.
BAT
is within its operating range.
uvd(VBAT)
Table
IO
Section
CC
BAT
is lower than V
or by setting the wake flag; see
10.
is lower than V
is lower than V
IO
CC
j(dis)(high)
6.6.2.
is higher than V
is higher than V
in a normal power mode with
uvd(VIO)
uvd(VCC)
uvd(VBAT)
TJA1080A
for longer than
uvd(VIO)
FlexRay transceiver
j(dis)(high)
uvd(VCC)
for longer than
© NXP B.V. 2011. All rights reserved.
. The UV
or the wake
j(dis)(high)
for longer
in a normal
VBAT
24 of 49
flag
in a