ISL54105CRZ Intersil, ISL54105CRZ Datasheet - Page 14

• Manufacturer Part Number: ISL54105CRZ
• Description: IC TMDS REGENERATOR 72-QFN
• Manufacturer: Intersil

Specifications of ISL54105CRZ

• Applications: Multimedia Displays, Test Equipment
• Interface: I²C
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 72-VFQFN Exposed Pad
• Mounting Type: Surface Mount
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADDR6
Signals from
the Host
SDA Bus
Signals from
the ISL54105
A7
D7
ADDR5 ADDR4
A6
D6
FROM TRANSMITTER
FROM RECEIVER
DATA OUTPUT
DATA OUTPUT
SCL FROM
R
A5
D5
S
T
A
T
ISL54105 Serial Bus
a a a a a a a 0
Serial Bus
HOST
Address
(Repeat if desired)
START Command
SDA
SCL
STOP Command
ADDR3 ADDR2
14
A4
D4
A
C
K
FIGURE 15. ACKNOWLEDGE RESPONSE FROM RECEIVER
A3
D3
AAAAAAAA
START
FIGURE 17. CONFIGURATION REGISTER WRITE
FIGURE 16. VALID DATA CHANGES ON THE SDA BUS
Register
Address
ADDR1 ADDR0
DATA STABLE
A2
D2
A
C
K
d d d d d d d d
A1
D1
1
Write*
Data
ISL54105
R/W
DATA CHANGE
A0
D0
0
C
A
K
S
O
P
T
Signals the beginning of serial I/O
ISL54105 Register Data Write(s)
This is the data to be written to the ISL54105’s configuration register.
Note: The ISL54105’s Configuration Register’s address pointer auto
increments after each data write: repeat this step to write multiple
sequential bytes of data to the Configuration Register.
ISL54105 Device Select Address Write
The first 7 bits of the first byte select the ISL54105 on the 2-wire
bus at the address set by the ADDR[6:0} pins. The R/W bit is a
0, indicating that the next transaction will be a write.
ISL54105 Register Address Write
This is the address of the ISL54105’s configuration register that
the following byte will be written to.
Signals the ending of serial I/O
* The data write step may be repeated to write to the
ISL54105’s Configuration Register sequentially, beginning at
the Register Address written in the previous step.
DATA STABLE
8
ACKNOWLEDGE
9
June 11, 2008
FN6723.0