CY7C131-25NC Cypress Semiconductor Corp, CY7C131-25NC Datasheet

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CY7C131-25NC

Manufacturer Part Number
CY7C131-25NC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C131-25NC

Density
8Kb
Access Time (max)
25ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
20b
Package Type
PQFP
Operating Temp Range
0C to 70C
Number Of Ports
2
Supply Current
170mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
52
Word Size
8b
Number Of Words
1K
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C131-25NC
Manufacturer:
CYP
Quantity:
349
1 K × 8 Dual-Port Static RAM
Features
Cypress Semiconductor Corporation
Document Number: 38-06002 Rev. *G
Notes
Logic Block Diagram
1. CY7C130 and CY7C130A are functionally identical; CY7C131 and CY7C131A are functionally identical.
2. CY7C130/130A/CY7C131/131A (Master): BUSY is open drain output and requires pull-up resistor.
3. Open drain outputs: pull-up resistor required.
True dual-ported memory cells, which allow simultaneous
reads of the same memory location
1 K × 8 organization
0.65 micron CMOS for optimum speed and power
High speed access: 15 ns
Low operating power: I
Fully asynchronous operation
Automatic power-down
Master CY7C130/130A/CY7C131/131A easily expands data
bus width to 16 or more bits using slave CY7C140/CY7C141
BUSY output flag on CY7C130/130A/CY7C131/131A; BUSY
input on CY7C140/CY7C141
INT flag for port-to-port communication
Available in 48-pin DIP (CY7C130/130A/140), 52-pin PLCC,
52-pin TQFP
Pb-free packages available
CY7C140/CY7C141 (Slave): BUSY is input.
CC
BUSY
INT
R/W
I/O
I/O
CE
OE
A
= 110 mA (maximum)
A
L
L
7L
0L
[2]
9L
[3]
0L
L
L
L
DECODER
ADDRESS
R/W
198 Champion Court
CE
OE
L
L
L
CONTROL
I/O
(7C130/7C131 ONLY)
INTERRUPT LOGIC
ARBITRATION
MEMORY
ARRAY
LOGIC
AND
Functional Description
The CY7C130/130A/CY7C131/131A/CY7C140
are high speed CMOS 1 K by 8 dual-port static RAMs. Two ports
are provided permitting independent access to any location in
memory. The CY7C130/130A/CY7C131/131A can be used as
either a standalone 8-bit dual-port static RAM or as a master
dual-port RAM in conjunction with the CY7C140/CY7C141 slave
dual-port device in systems requiring 16-bit or greater word
widths. It is the solution to applications requiring shared or
buffered data, such as cache memory for DSP, bit-slice, or multi-
processor designs.
Each port has independent control pins; chip enable (CE), write
enable (R/W), and output enable (OE). Two flags are provided
on each port, BUSY and INT. BUSY signals that the port is trying
to access the same location currently being accessed by the
other port. INT is an interrupt flag indicating that data is placed
in a unique location (3FF for the left port and 3FE for the right
port). An automatic power down feature is controlled
independently on each port by the chip enable (CE) pins.
The CY7C130/130A and CY7C140 are available in 48-pin DIP.
The CY7C131/131A and CY7C141 are available in 52-pin
PLCC, 52-pin Pb-free PLCC, 52-pin PQFP, and 52-pin Pb-free
PQFP.
1 K × 8 Dual-Port Static RAM
CONTROL
I/O
San Jose
DECODER
ADDRESS
CE
OE
R/W
R
R
R
,
CA 95134-1709
CY7C130, CY7C130A
CY7C131, CY7C131A
INT
A
A
R/W
CE
OE
I/O
I/O
BUSY
0R
9R
R
7R
0R
R
R
R
[3]
R
Revised October 11, 2010
[1]
and CY7C141
408-943-2600
[+] Feedback

Related parts for CY7C131-25NC

CY7C131-25NC Summary of contents

Page 1

... INT L Notes 1. CY7C130 and CY7C130A are functionally identical; CY7C131 and CY7C131A are functionally identical. 2. CY7C130/130A/CY7C131/131A (Master): BUSY is open drain output and requires pull-up resistor. CY7C140/CY7C141 (Slave): BUSY is input. 3. Open drain outputs: pull-up resistor required. Cypress Semiconductor Corporation Document Number: 38-06002 Rev × ...

Page 2

... Operating Range ............................................................... 5 Electrical Characteristics ................................................. 5 Capacitance ...................................................................... 6 Switching Characteristics ................................................ 7 Switching Characteristics ................................................ 9 Switching Waveforms .................................................... 11 Typical DC and AC Characteristics .............................. 16 Document Number: 38-06002 Rev. *G CY7C130, CY7C130A CY7C131, CY7C131A Ordering Information ...................................................... 17 Ordering Code Definitions ......................................... 17 Package Diagrams .......................................................... 18 Acronyms ........................................................................ 20 Document Conventions ................................................. 20 Units of Measure ....................................................... 20 Document History Page ................................................. 21 Sales, Solutions, and Legal Information ...................... 22 Worldwide Sales and Design Support ...

Page 3

... Figure 1. Pin Diagram - DIP (Top View R BUSY 46 R BUSY INT INT 7C130 7C140 I I/O I I/O I I/O I I/O I I/O GND 0R Figure 3. Pin Diagram - PQFP (Top View 5150 I I 1415 CY7C130, CY7C130A CY7C131, CY7C131A 7C131 7C141 I Page [+] Feedback ...

Page 4

... Data bus input/output Interrupt flag Busy flag Power Ground 7C130-30 7C130-35 [4] 7C130A-30 [4] 7C131-25 7C131-35 7C131-30 7C141-25 7C140-35 7C140-30 7C141-35 7C141- 190 170 170 CY7C130, CY7C130A CY7C131, CY7C131A Description 7C130-45 7C130-55 7C131-45 7C131-55 7C140-45 7C140-55 7C141-45 7C141- 120 120 110 Page Unit [+] Feedback ...

Page 5

... V – 0 < 0 Commercial – 125 L > V – 0 > V – 0 < 0 [11] MAX and using AC Test Waveforms input levels of GND CY7C130, CY7C130A CY7C131, CY7C131A Ambient Temperature V CC   + ± 10%   – + ± 10%   – +125 ± 10% [4] 7C130-30 ...

Page 6

... Figure 4. AC Test Loads and Waveforms R1 893  OUTPUT 347  INCLUDING JIGAND (b) SCOPE ALL INPUT PULSES 3.0 V 90% 10% GND 1.40 V  CY7C130, CY7C130A CY7C131, CY7C131A Max Unit 281  BUSY OR INT 30 pF BUSY Output Load (CY7C130/CY7C131 ONLY) 90% 10% 5ns Page [+] Feedback ...

Page 7

... HZCE LZCE HZOE = part ( Test Loads. Transition is measured ±500 mV from steady state voltage. L CY7C130, CY7C130A CY7C131, CY7C131A 7C130-30 [14] 7C130-25 7C130A-30 7C131-25 7C131-30 7C140-25 Unit 7C140-30 7C141-25 7C141-30 Min Max Min Max 25 – 30 – ...

Page 8

... Note 22 – Note 22 – 15 – 15 – 15 [20] – 15 [20] – 15 [20] – 15 CY7C130, CY7C130A CY7C131, CY7C131A 7C130-30 [14] 7C130-25 7C130A-30 7C131-25 7C131-30 7C140-25 Unit 7C140-30 7C141-25 7C141-30 Min Max Min Max – 20 – – 20 – – 20 – ...

Page 9

... HZCE LZCE HZOE = part ( Test Loads. Transition is measured ±500 mV from steady state voltage. L CY7C130, CY7C130A CY7C131, CY7C131A 7C130-45 7C130-55 7C131-45 7C131-55 7C140-45 7C140-55 Unit 7C141-45 7C141-55 Min Max Min Max 45 – 55 – ns – ...

Page 10

... Note 32 – Note 32 – 25 – 25 – 25 [20] – 25 [20] – 25 [20] – 25 CY7C130, CY7C130A CY7C131, CY7C131A 7C130-45 7C130-55 7C131-45 7C131-55 7C140-45 7C140-55 Unit 7C141-45 7C141-55 Min Max Min Max – 25 – – 25 – – 25 – – ...

Page 11

... Switching Waveforms ADDRESS t OHA DATA OUT PREVIOUS DATA VALID LZOE t LZCE DATA OUT Read with BUSY, Master: CY7C130 and CY7C131 ADDRESS R R INR ADDRESS BUSY L DOUT L Notes 33. R/W is HIGH for read cycle. 34. Device is continuously selected and 35. Address valid prior to or coincident with CE transition LOW. ...

Page 12

... If the CE LOW transition occurs simultaneously with or after the R/W LOW transition, the outputs remain in the high impedance state. Document Number: 38-06002 Rev. *G Either Port SCE PWE t SD DATA VALID HIGH IMPEDANCE SCE PWE t SD DATA VALID t HZWE HIGH IMPEDANCE PWE HZWE CY7C130, CY7C130A CY7C131, CY7C131A [36, 37 [38, 39 LZWE to allow the data I/O pins to enter high impedance Page [+] Feedback ...

Page 13

... ADDRESS MATCH ADDRESS ADDRESS R BUSY R Right Address Valid First ADDRESS MATCH ADDRESS ADDRESS L BUSY L Document Number: 38-06002 Rev. *G ADDRESS MATCH BLC BHC ADDRESS MATCH BLC BHC ADDRESS MISMATCH t t BLA BHA ADDRESS MISMATCH t t BLA BHA CY7C130, CY7C130A CY7C131, CY7C131A Page [+] Feedback ...

Page 14

... Switching Waveforms (continued) Write with BUSY (Slave:CY7C140/CY7C141 BUSY Document Number: 38-06002 Rev. *G Figure 12. Busy Timing Diagram No PWE t WH CY7C130, CY7C130A CY7C131, CY7C131A Page [+] Feedback ...

Page 15

... SA INT L Left Side Clears INT L ADDR R INT L Document Number: 38-06002 Rev. *G Figure 13. Interrupt Timing Diagrams t WC WRITE 3FF EINS t WINS INT t EINR t OINR EINS t WINS EINR CY7C130, CY7C130A CY7C131, CY7C131A t RC READ 3FF t RC READ 3FE INR t OINR Page [+] Feedback ...

Page 16

... OUTPUT LOADING 30.0 25.0 20.0 15.0 10 4. 25C 200 400 600 800 1000 CAPACITANCE (pF) CY7C130, CY7C130A CY7C131, CY7C131A OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 5. 25C 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 140 ...

Page 17

... Ordering Information Speed Ordering Code (ns) 55 CY7C130-55PC 15 CY7C131A-15JXI CY7C131-15NXI 25 CY7C131-25JXC CY7C131-25NC CY7C131-25NXC 55 CY7C131-55JXC CY7C131-55NXC CY7C131-55JXI CY7C131-55NXI Ordering Code Definitions CY7C 13XX - Document Number: 38-06002 Rev. *G Package Package Type Name P25 48-pin (600 Mil) Molded DIP J69 52-pin Pb-free Plastic Leaded Chip Carrier ...

Page 18

... Package Diagrams Figure 15. 52-pin Pb-free Plastic Leaded Chip Carrier J69 Document Number: 38-06002 Rev. *G Figure 14. 48-pin (600 Mil) Sidebraze DIP D26 CY7C130, CY7C130A CY7C131, CY7C131A 51-80044 *A 51-85004 *B Page [+] Feedback ...

Page 19

... Package Diagrams (continued) Figure 17. 52-pin Pb-free Plastic Quad Flatpack N52 Document Number: 38-06002 Rev. *G Figure 16. 48-pin (600 Mil) Molded DIP P25 CY7C130, CY7C130A CY7C131, CY7C131A 51-85020 *C 51-85042 *A Page [+] Feedback ...

Page 20

... Transistor–transistor logic Document Conventions Units of Measure Symbol Unit of Measure ns nano seconds V Volts µA micro Amperes mA milli Amperes ms milli seconds mV milli Volts MHz Mega Hertz pF pico Farad W Watts °C degree Celcius Document Number: 38-06002 Rev. *G CY7C130, CY7C130A CY7C131, CY7C131A Page [+] Feedback ...

Page 21

... Document History Page Document Title: CY7C130/CY7C130A/CY7C131/CY7C131A Dual-Port Static RAM Document Number: 38-06002 Orig. of Rev. ECN No. Change ** 110169 SZV *A 122255 RBI *B 236751 YDT *C 325936 RUY *D 393153 YIM *E 2623540 VKN/PYRS *F 2897217 RAME *G 3054633 ADMU Document Number: 38-06002 Rev. *G Submission Date 09/29/01 Change from Spec number: 38-00027 to 38-06002 ...

Page 22

... Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 38-06002 Rev. *G All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised October 11, 2010 CY7C130, CY7C130A CY7C131, CY7C131A PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 ...

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