BGY288 NXP Semiconductors, BGY288 Datasheet - Page 4

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BGY288

Manufacturer Part Number
BGY288
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of BGY288

Mounting
Surface Mount
Pin Count
16
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
BGY288
Manufacturer:
INTEL
Quantity:
28
Part Number:
BGY288
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Philips Semiconductors
5. Functional description
9397 750 14011
Preliminary data sheet
5.1 Operating conditions
5.2 Power amplifier
5.3 Control logic
5.4 Power controller
5.5 Mode control
The BGY288 is designed to meet the 3GPP TS 45.005 technical specification for the
ETSI.
The low band (GSM850 and EGSM900) and the high band (DCS1800 and PCS1900)
channel power amplifiers each comprises three cascaded gain stages, input and output
matching and harmonic filters. The output power of each amplifier is determined by the
bias on each of its 3 gain stages and is controlled by an internal signal generated in the
power controller block. Each power amplifier block generates a power sense signal which
is routed internally to the power control block.
The control logic block generates the various signals to control the complete BGY288
depending on the signal levels on pins TXON and BAND, as indicated in
control logic block supply voltage is via pin V
Idle mode and the battery current consumption is almost zero. The power control block is
enabled when pin TXON goes HIGH. The low band (GSM850/EGSM900) channel is
enabled when pin BAND goes LOW and the high band (DCS1800/PCS1900) channel is
enabled when pin BAND goes HIGH. Both TXON and BAND inputs have pull-down
resistors of approximately 1 M .
The main inputs to the power controller block are the RF power control signal via pin PC
and the output power sense signal internally generated by each power amplifier block.
The PC signal is the reference voltage for the requested level of output power, and is
usually generated by an external digital-to-analog converter. The PC signal is buffered
and compared with the output power sense signal. The resultant error signal is then
amplified by one of two integrators, the selection of which being dependant on the level of
the BAND signal. The output of the selected integrator is the internal signal which controls
the biasing circuits of the selected channel.
Table 3:
Mode
Idle
Standby control logic functioning; power amplifier off
LB TX
HB TX
Mode description
power amplifier fully off; minimal leakage current 0
low-band transmit mode (GSM850/EGSM900)
high-band transmit mode (DCS1800/PCS1900)
Mode control
Rev. 01 — 2 February 2005
Power amplifier with integrated control loop
STAB
. When pin V
V
(V)
2.6 to 3 LOW
2.6 to 3 HIGH
2.6 to 3 HIGH
STAB
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
STAB
TXON
LOW
= 0 V, the BGY288 is in
BAND
LOW
HIGH or
LOW
LOW
HIGH
BGY288
Table
3. The
PC (V)
< 0.15
< 0.15
< 2.5
< 2.5
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