PSB4860HV4.1 Lantiq, PSB4860HV4.1 Datasheet - Page 77

• Manufacturer Part Number: PSB4860HV4.1
• Manufacturer: Lantiq

Specifications of PSB4860HV4.1

• Lead Free Status / Rohs Status: Supplier Unconfirmed

2.1.20
The peak detector (figure 41) is usually not used in normal operation. It provides,
however, an easy means to verify the minimum or maximum signal level of any signal S
within the . The peak detector stores either the maximum or the minimum signal value of
the observed signal I
Therefore it is not only possible to determine the absolute level of the signal but it can
also be checked whether a DC offset is present. This can be done by first scanning for
the maximum and then for the minimum value. If the minimum value is not
(approximately) the negated positive value then a DC offset is present. The peak
detector should be disabled if not needed.
Figure 41 Peak Detector - Block Diagram
The register PDDATA gives the maximum or minimum integer depending on the mode
selected by bit MM. As an example it may be assumed that the detection of the maximum
is selected. Then with enabling the detector and with each read access to register
PDDATA, PDDATA is set to the smallest possible value, which is the negative maximum
integer. With each new maximum detected on signal I1, this maximum is provided by
PDDATA.
Table 43
Register
PDCTL
PDCTL
PDCTL
PDDATA
Data Sheet
Peak Detector
Peak Detector Registers
# of Bits
1
1
5
16
I
1
1
in the register PDDATA since the last read access to this register.
Name
EN
MM
I1
Detector
Comment
Peak Detector Enable
Minimum/Maximum selection
Input signal selection
Min/Max signal value since last read access
Peak
77
SCI
PSB 4860
2000-01-14
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