UDA1384H NXP Semiconductors, UDA1384H Datasheet - Page 32

Encoders, Decoders, Multiplexers & Demultiplexers LO CST MULTICH CODEC

UDA1384H

Manufacturer Part Number
UDA1384H
Description
Encoders, Decoders, Multiplexers & Demultiplexers LO CST MULTICH CODEC
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UDA1384H

Maximum Operating Temperature
+ 85 C
Package / Case
SOT-307
Minimum Operating Temperature
- 20 C
Mounting Style
SMD/SMT
Lead Free Status / Rohs Status
 Details
Other names
UDA1384H/N1,557

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UDA1384H
Quantity:
2 000
Part Number:
UDA1384H/N1,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
UDA1384H/N1,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
9397 750 14366
Product data sheet
11.6 Status output register
Table 36:
Table 37:
Bit
15 to 6
5
4
3
2
1
0
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Symbol
-
VS
AS1
AS0
DS2
DS1
DS0
Status output register (address 0Fh) bit allocation
Description of status output register bits
15
7
-
-
-
-
Description
not used
Voice ADC status. Bit VS indicates the hard mute status of the voice ADC.
ADC 2 status. Bit AS1 indicates the hard mute status of ADC 2.
ADC 1 status. Bit AS0 indicates the hard mute status of ADC 1.
DAC channel 5 and 6 status. Bit DS2 indicates the hard mute status of DAC
channel 5 and 6.
DAC channel 3 and 4 status. Bit DS1 indicates the hard mute status of DAC
channel 3 and 4.
DAC channel 1 and 2 status. Bit DS0 indicates the hard mute status of DAC
channel 1 and 2.
1 = power-down is ready and the clock may be disabled
0 = power-down is not ready and the clock should not be disabled
1 = power-down is ready and the clock may be disabled
0 = power-down is not ready and the clock should not be disabled
1 = power-down is ready and the clock may be disabled
0 = power-down is not ready and the clock should not be disabled
1 = power-down is ready and the clock may be disabled
0 = power-down is not ready and the clock should not be disabled
1 = power-down is ready and the clock may be disabled
0 = power-down is not ready and the clock should not be disabled
1 = power-down is ready and the clock may be disabled
0 = power-down is not ready and the clock should not be disabled
Rev. 02 — 17 January 2005
14
6
-
-
-
-
VS
13
5
-
-
-
AS1
12
4
-
-
-
read only
read only
Multichannel audio coder-decoder
AS0
11
3
-
-
-
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
DS2
10
2
-
-
-
UDA1384
DS1
9
1
-
-
-
DS0
32 of 55
8
0
-
-
-

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