GAL20XV10B-15LP Lattice, GAL20XV10B-15LP Datasheet - Page 7

• Manufacturer Part Number: GAL20XV10B-15LP
• Description: SPLD GAL Family 10 Macro Cells 83.3MHz EECMOS Technology 5V 24-Pin PDIP
• Manufacturer: Lattice

Specifications of GAL20XV10B-15LP

• Package: 24PDIP
• Family Name: GAL
• Number Of Macro Cells: 10
• Maximum Propagation Delay Time: 15 ns
• Typical Operating Supply Voltage: 5 V
• Maximum Internal Frequency: 83.3 MHz
• Number Of Product Terms Per Macro: 4
• Re-programmability Support: Yes

Feedback Mode Logic Diagram
10(12)
11(13)
9(11)
8(10)
1(2)
2(3)
3(4)
4(5)
5(6)
6(7)
7(9)
1080
1120
1240
1280
1400
1440
1560
120
160
280
320
440
480
600
640
760
800
920
960
0
0
40-USER ELECTRONIC SIGNATURE FUSES
1631, 1632, ....
Byte4 Byte3 ....
4
8
12
DIP (PLCC) Package Pinouts
16
20
24
7
28
.... Byte1 Byte0
.... 1669, 1670
32
36
Specifications GAL20XV10
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
XOR - 1600
AC0 - 1610
AC1 - 1620
XOR - 1601
AC0 - 1611
AC1 - 1621
XOR - 1602
AC0 - 1612
AC1 - 1622
XOR - 1603
AC0 - 1613
AC1 - 1623
XOR - 1604
AC0 - 1614
AC1 - 1624
XOR - 1605
AC0 - 1615
AC1 - 1625
XOR - 1606
AC0 - 1616
AC1 - 1626
XOR - 1607
AC0 - 1617
AC1 - 1627
XOR - 1608
AC0 - 1618
AC1 - 1628
XOR - 1609
AC0 - 1619
AC1 - 1629
SYN - 1630
23(27)
22(26)
19(23)
17(20)
13(16)
21(25)
20(24)
18(21)
16(19)
15(18)
14(17)