GAL20XV10B-15LP Lattice, GAL20XV10B-15LP Datasheet - Page 9

• Manufacturer Part Number: GAL20XV10B-15LP
• Description: SPLD GAL Family 10 Macro Cells 83.3MHz EECMOS Technology 5V 24-Pin PDIP
• Manufacturer: Lattice

Specifications of GAL20XV10B-15LP

• Package: 24PDIP
• Family Name: GAL
• Number Of Macro Cells: 10
• Maximum Propagation Delay Time: 15 ns
• Typical Operating Supply Voltage: 5 V
• Maximum Internal Frequency: 83.3 MHz
• Number Of Product Terms Per Macro: 4
• Re-programmability Support: Yes

1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Description section.
3) Refer to fmax Description section.
*Characterized but not 100% tested
PARAMETER
AC Switching Characteristics
Capacitance (T
f
SYMBOL
max
t
t
t
t
t
t
t
t
dis
en
cf
t
wh
pd
co
su
wl
C
h
2
C
3
I/O
I
COND.
TEST
—
—
—
—
—
C
C
A
A
A
A
A
B
B
1
A
= 25 C, f = 1.0 MHz)
Input or I/O to Combinatorial Output
Clock to Output Delay
Clock to Feedback Delay
Setup Time, Input or Feedback before Clock
Hold Time, Input or Feedback after Clock
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
Maximum Clock Frequency with
No Feedback
Clock Pulse Duration, High
Clock Pulse Duration, Low
Input or I/O to Output Enabled
OE to Output Enabled
Input or I/O to Output Disabled
OE to Output Disabled
DESCRIPTION
Input Capacitance
I/O Capacitance
PARAMETER
Over Recommended Operating Conditions
MAXIMUM*
8
8
9
Specifications GAL20XV10
76.9
100
100
MIN. MAX.
—
3
2
6
0
4
4
3
2
3
2
UNITS
COM
pF
pF
-10
10
10
—
—
—
—
—
—
—
7
4
9
9
9
62.5
83.3
83.3
MIN. MAX.
—
3
2
8
0
6
6
3
2
3
2
COM
-15
V
V
15
15
10
15
10
TEST CONDITIONS
—
—
—
—
—
—
—
8
4
CC
CC
= 5.0V, V
= 5.0V, V
71.4
71.4
MIN. MAX.
—
10
50
3
2
0
7
7
3
2
3
2
COM
-20
I/O
I
= 2.0V
= 2.0V
20
10
20
15
20
15
—
—
—
—
—
—
—
4
UNITS
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns