AD8151AST Analog Devices Inc, AD8151AST Datasheet - Page 13

• Manufacturer Part Number: AD8151AST
• Description: IC CROSSPOINT SWIT 33X17 184LQFP
• Manufacturer: Analog Devices Inc

Specifications of AD8151AST

• Rohs Status: RoHS non-compliant
• Function: Crosspoint Switch
• Circuit: 1 x 33:17
• Voltage Supply Source: Dual Supply
• Voltage - Supply, Single/dual (±): ±3 V ~ 5.25 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 184-LQFP
• Number Of Arrays: 1
• Differential Data Transmission: Yes
• Operating Supply Voltage (typ): Not RequiredV
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Cascading Capability: No
• Line Code: NRZ
• On-chip Buffers: Yes
• On-chip Mux/demux: No
• Operating Supply Voltage (max): Not RequiredV
• Operating Supply Voltage (min): Not RequiredV
• Lead Free Status / RoHS Status: Not Compliant

CONTROL INTERFACE TRUTH TABLES
Table 4. Basic Control Functions
RESET
0
1
1
1
1
1
1
Table 5. Address/Data Examples
A4
0
1
Binary Output Number
Binary Output Number
1
1
1
2
X means don’t care.
X means don’t care.
The binary output number can also be the broadcast connection designator, 10001.
Output Address Pins
A3
0
0
0
0
MSB–LSB
CS
X
1
0
0
0
0
A2
0
0
0
0
Control Pins
WE
X
X
0
1
1
0
A1
0
0
0
1
2
RE
X
1
0
1
1
X
2
A0
0
0
1
0
1
Enable
Bit
D6/E
X
X
1
0
X
X
UPDATE
X
X
1
1
0
0
1
D5
0
1
X
1
Input Address Pins MSB–LSB
Function
Global Reset. Reset all second rank enable bits to zero (disable all outputs).
Control Disable. Ignore all logic (but the signal matrix still functions as programmed). D [6:0]
are high impedance.
Single Output Preprogram. Write input configuration data from Data Bus D [6:0] into first rank
of latches for the output selected by the Output Address Bus A [4:0].
Single Output Readback. Readback input configuration data from second rank of latches onto
Data Bus D [6:0] for the single output selected by the Output Address Bus A [4:0].
Global Update. Copy input configuration data from all 17 first rank latches into second rank of
latches, updating signal matrix connections for all outputs.
Transparent Write and Update. It is possible to write data directly onto rank two. This simplifies
logic when synchronous signal matrix updating is not necessary.
D4
0
0
Binary Input Number
X
Binary Input Number
0
D3
0
0
X
0
X
D2
0
0
0
Rev. B | Page 13 of 40
D1
0
0
X
0
D0
0
0
X
1
1
Function
Lower Address/Data Range. Connect Output 00
(A[4:0] = 00000) to Input 00 (D[5:0] = 000000).
Upper Address/Data Range. Connect Output 16
(A[4:0] = 10000) to Input 32 (D[5:0] = 100000).
Enable Output. Connect Selected Output (A[4:0] = 0 to 16) to
Designated Input (D[5:0] = 0 to 32) and Enable Output
(D6 = 1).
Disable Output. Disable Specified Output (D6 = 0).
Broadcast Connection. Connect all 17 outputs to same
designated input and set all 17 enable bits to D6. Readback is
not possible with the broadcast address.
Reserved. Any address or data code greater or equal to these
are reserved for future expansion or factory testing.
AD8151