B300D44A102XXG ON Semiconductor, B300D44A102XXG Datasheet

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B300D44A102XXG

Manufacturer Part Number
B300D44A102XXG
Description
IC PROCESSOR AUDIO 24BIT 44DFN
Manufacturer
ON Semiconductor
Series
BelaSigna® 300r
Type
Audio Processorr
Datasheet

Specifications of B300D44A102XXG

Applications
Portable Equipment
Mounting Type
Surface Mount
Package / Case
44-VFDFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
B300D44A102XXG
B300D44A102XXGOSTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
B300D44A102XXG
Manufacturer:
ON Semiconductor
Quantity:
1 450
Part Number:
B300D44A102XXG
Manufacturer:
ON/安森美
Quantity:
20 000
BelaSigna 300
Audio Processor for Portable
Communication Devices
Introduction
system that delivers superior audio clarity without compromising size
or battery life. The processor is specifically designed for monaural
portable communication devices requiring high performance audio
processing capabilities and programming flexibility when form−factor
and power consumption are key design constraints.
HEAR configurable accelerator signal processing engine, high speed
debugging interface, advanced algorithm security system, state−of−
the−art analog front end, Class D output stage and much more,
constitute an entire system on a single chip, which enables
manufacturers to create a range of advanced and unique products. The
system features a high level of instructional parallelism, providing
highly efficient computing capability. It can simultaneously execute
multiple advanced adaptive noise reduction and echo cancellation
algorithms, and uses an asymmetric dual−core patented architecture to
allow for more processing in fewer clock cycles, resulting in reduced
power consumption.
development tools, hands−on training, full technical support and a
network of solution partners offering software and engineering
services to help speed product design and shorten time to market.
Key Features
© Semiconductor Components Industries, LLC, 2011
March, 2011 − Rev. 7
BelaSigna
The efficient dual−MAC 24−bit CFX DSP core, together with the
BelaSigna 300 is supported by a comprehensive suite of
audio system consisting of the CFX core, a fully programmable,
highly cycle−efficient, dual−Harvard architecture 24−bit DSP
utilizing explicit parallelism; the HEAR configurable accelerator for
optimized signal processing; and an efficient input/output controller
(IOC) along with a full complement of peripherals and interfaces,
which optimize the architecture for audio processing at extremely
low power consumption
exceptionally low system noise and low group delay
2.68 mm x 0.92 mm (including solder balls) WLCSP package. In
addition, BelaSigna 300 is also available in a bigger DFN package
allowing easier assembly and PCB routing
sources (depends on package selection) can be used simultaneously
for multiple microphones or direct analog audio inputs
interface for download, debug and general communication, a highly
configurable PCM interface to stream data into and out of the device,
a high−speed UART, an SPI port and 5 GPIOs
Flexible DSP−based System: a complete DSP−based, mixed−signal
Ultra−low−power: typically 1−5 mA
Excellent Audio Fidelity: up to 110 dB input dynamic range,
Miniature Form Factor: available in a miniature 3.63 mm x
Multiple Audio Input Sources: four input channels from five input
Full Range of Configurable Interfaces: including a fast I
®
300 is a DSP−based mixed−signal audio processing
1
2
C−based
B300W35A102XYG
B300D44A102XXG
Device
CASE 506BU
BELASIGNA300 = Device Code
35
02
G
XXXX
Y
ZZ
D SUFFIX
DFN−44
ORDERING INFORMATION
MARKING DIAGRAM
http://onsemi.com
BELASIGNA300
35−02−G
XXXXYZZ
= Number of Balls
= Revision of Die
= Pb−Free
= Date Code
= Assembly Plant Identifier
=
= Traceability Code
(May be Two Characters)
(Pb−Free)
(Pb−Free)
Package
WLCSP
Publication Order Number:
DFN
CASE 567AG
WLCSP−35
W SUFFIX
2500 Units /
2500 Units /
Shipping
Reel
Reel
B300/D

Related parts for B300D44A102XXG

B300D44A102XXG Summary of contents

Page 1

... Pb−Free XXXX = Date Code Y = Assembly Plant Identifier = (May be Two Characters Traceability Code ORDERING INFORMATION Device Package B300W35A102XYG WLCSP (Pb−Free) B300D44A102XXG (Pb−Free) 2 C−based 1 WLCSP−35 W SUFFIX CASE 567AG Shipping 2500 Units / Reel DFN 2500 Units / Reel Publication Order Number: B300/D ...

Page 2

Integrated A/D Converters and Powered Output: minimize need for external components • Flexible Clocking Architecture: supports speeds MHz • “Smart” Power Management: including low current standby mode requiring only 0.06 mA • Diverse Memory Architecture: 4864x48−bit ...

Page 3

Figures and Data Table 1. ABSOLUTE MAXIMUM RATINGS Parameter Voltage at any input pin Operating supply voltage (Note 1) Operating temperature range (Note 2) Storage temperature range (Note 3) Caution: Class 2 ESD Sensitivity, JESD22−A114−B (2000 V) Stresses exceeding Maximum ...

Page 4

Table 2. ELECTRICAL SPECIFICATIONS Description Symbol VDBL (1 mF External Capacitor) Regulator PSRR VDBL PSRR Load current I LOAD Load regulation LOAD REG Line regulation LINE REG VDDC (1 mF External Capacitor) Digital supply voltage output VDDC VDDC output level ...

Page 5

Table 2. ELECTRICAL SPECIFICATIONS Description Symbol DIRECT DIGITAL OUTPUT Maximum load current I DO Output impedance R DO Output dynamic range DO DR Output THD+N DO THDN Output voltage DO VOUT ANTI−ALIASING FILTERS (Input and Output) Preamplifier filter cut−off frequency ...

Page 6

... All BelaSigna 300 packages are Pb−free, RoHS−compliant and Green. BelaSigna 300 parts are qualified against standards outlined in the following sections. All BelaSigna 300 package options are Green (RoHS−compliant). Contact ON Semiconductor for supporting documentation. WLCSP Package Option The solder ball composition for the WLCSP package is SAC266. Table 3. WLCSP PACKAGE− ...

Page 7

WLCSP Pin Out A total of 35 active pins are present on the BelaSigna 300 WLCSP package. They are organized in a staggered array. A description of these pins is given in Table 7. Table 7. WLCSP PAD DESCRIPTIONS Pad ...

Page 8

... ON Semiconductor can provide BelaSigna 300 WLCSP land pattern CAD files to assist your PCB design upon request. Description Ground for output driver ...

Page 9

Table 8. DFN PAD DESCRIPTIONS Pad Index BelaSigna 300 Pad Name 28 VDDO_SPI 32 SPI_CLK 31 SPI_SERI 30 SPI_CS 29 SPI_SERO 37 SDA (I2C) 36 SCL (I2C) 35 EXT_CLK 27 PCM_FR 26 PCM_SERI 25 PCM_SERO 24 PCM_CLK 23 Reserved DFN ...

Page 10

The DGND plane is used as the ground return for digital circuits and should be placed under digital circuits. The AGND plane should be kept as noise−free as possible used as the ground return for analog circuits and ...

Page 11

Table 10. NON−CRITICAL SIGNALS Pin Name CAP0, CAP1 SDA, SCL GPIO[3..0] UART_RX, UART_TX PCM_FRAME, PCM_CLK, PCM_OUT, PCM_IN LSAD[4..1] SPI_CLK, SPI_CS, SPI_SERI, SPI_SERO Audio Inputs The audio input traces should be as short as possible. The input impedance of each audio ...

Page 12

Table 11. RECOMMENDATIONS FOR UNUSED PADS WLCSP Ball Index DFN Pin Index Architecture Overview The architecture of BelaSigna 300 is shown in Figure 2. Downsampling Downsampling ...

Page 13

CFX DSP Core The CFX DSP is a user−programmable general−purpose DSP core that uses a 24−bit fixed−point, dual−MAC, dual−Harvard architecture able to perform two MACs, two memory operations and two pointer updates per cycle, making it well−suited to ...

Page 14

CFX DSP Instruction Set Table 12 shows the list of all general CFX instructions and their description. Many instructions have multiple variations not shown in the table. Please refer to the CFX DSP Architecture Manual for more details. Table 12. ...

Page 15

Table 12. CFX SUMMARY INSTRUCTION SET Instruction RETURNI Return from an interrupt SHLL Shift a data register left logically SHRA Shift a data register right arithmetically SHRL Shift a data register right logically SLEEP Enter sleep mode and wait for ...

Page 16

Shared Memories The shared CFX/HEAR memories include the following: Table 14. SHARED MEMORIES Type Data memory (RAM) H0MEM, H1MEM, H2MEM, H3MEM, H4MEM, H5MEM FIFO memory (RAM) AMEM, BMEM Coefficient memory (RAM) CMEM, DMEM Data ROM SIN/COS LUT Microcode memory (RAM) ...

Page 17

FIFO Controller The FIFO controller handles the moving of data to and from the FIFOs, after being initially configured eight FIFOs can be created by the FIFO controller, four in A memory (AMEM) and four in B memory ...

Page 18

The structure of the PMEM address space is shown in Figure 6. Program Memory (RAM) (Mirror: 0x3000−0x3FFF) Memory Mapped Analog and Digital Registers Microcode Memory Program Memory (RAM) Program Memory (Boot ROM) 0x10000 0xF000 0xE000 0x8800 0x8000 0x4000 P Memory ...

Page 19

Other Digital Blocks and Functions General−Purpose Timer The CFX DSP system contains two general−purpose timers. These can be used for scheduling tasks that are not part of the sample−based signal−processing scheme, such as checking the battery voltage, and periodically asserting ...

Page 20

Analog Blocks Input Stage The analog audio input stage is comprised of four individual channels. For each channel, one input can be selected from any of the five possible input sources (depending on package option) and is then routed to ...

Page 21

... Figure 10. External Signal Routing of Connections for High−Power Output Mode The high−frequencies in the Class−D PDM output are filtered filter or by the frequency response of the speaker itself. ON Semiconductor recommends a 2−pole RC Our recommendations for components for the RC Filter are given below: For 8 KHz sampling, we recommend ...

Page 22

Power Supply Unit BelaSigna 300 has multiple power sources as can be seen on Figure 13. Digital and analog sections of the chip have their own power supplies to allow exceptional audio quality. Battery Supply Voltage (VBAT) The primary voltage ...

Page 23

... VDDC is not set by the boot ROM. Thus, care must be taken when using the DFN at high clock frequencies to ensure that the VDDC configuration is properly set. Contact ON Semiconductor for more information regarding VDDC calibration. External Digital Supply Voltage (VDDO) VDDO is an externally provided power source used by the pads of BelaSigna 300 ...

Page 24

Power Management Strategy BelaSigna 300 has a built−in power management unit that guarantees valid system operation under any voltage supply condition to prevent any unexpected audio output as the result of any supply irregularity. The unit constantly monitors the power ...

Page 25

Application Diagrams The application diagram of BelaSigna 300 (WLCSP Option) is shown in Figure 14. 2 AGND Preamplifiers Downsampling A/D A/D A/D AI4 A/D UART SPI Timer 1 Timer 2 Watchdog Timer CRC ...

Page 26

The application diagram of BelaSigna 300 (DFN Option) is shown in Figure 15. 2 − AGND Preamplifiers Downsampling A/D AI2 A/D AI3 A/D AI4 A/D SPI_CS SPI_CLK Optional SPI_SERI SPI EEPROM SPI_SERO ...

Page 27

... CARRIER DETAILS 2.6 x 3.8 mm WLCSP ON Semiconductor offers tape and reel packing for BelaSigna 300 WLCSP. The packing consists of a pocketed carrier tape, a cover tape, and a molded anti−static polystyrene reel. The carrier and cover tape create an ESD safe environment, protecting the components from physical and electrostatic damage during shipping and handling. ...

Page 28

... DFN ON Semiconductor offers tape and reel packing for BelaSigna 300 DFN. The packing consists of a pocketed carrier tape, a cover tape, and a molded anti−static polystyrene reel. The carrier and cover tape create an ESD safe environment, protecting the components from physical and electrostatic damage during shipping and handling. ...

Page 29

... B300W35A102XYG. To order BelaSigna 300 DFN, please contact your account manager and ask for part number B300D44A102XXG. Chip Identification Chip identification information can be retrieved by using the Communications Accelerator Adaptor (CAA) tool along with the protocol software provided by ON Semiconductor Figure 20 ...

Page 30

... 0. BOTTOM VIEW *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS WLCSP35, 3.63x2.68 CASE 567AG−01 ISSUE B A PIN A1 REFERENCE È È SEATING C PLANE RECOMMENDED ...

Page 31

... NOTE 3 M 0.26 44X *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...

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