B300D44A102XXG ON Semiconductor, B300D44A102XXG Datasheet - Page 10

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B300D44A102XXG

Manufacturer Part Number
B300D44A102XXG
Description
IC PROCESSOR AUDIO 24BIT 44DFN
Manufacturer
ON Semiconductor
Series
BelaSigna® 300r
Type
Audio Processorr
Datasheet

Specifications of B300D44A102XXG

Applications
Portable Equipment
Mounting Type
Surface Mount
Package / Case
44-VFDFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
B300D44A102XXG
B300D44A102XXGOSTR

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circuits and should be placed under digital circuits. The
AGND plane should be kept as noise−free as possible. It is
used as the ground return for analog circuits and it should
surround analog components and pins. It should not be
connected to or placed under any noisy circuits such as RF
chips, switching supplies or digital pads of BelaSigna 300
itself. Analog ground returns associated with the audio
output stage should connect back to the star point on separate
individual traces.
consideration, see Table 9 and Table 10.
ground planes impractical. In this case a star configuration
strategy should be used. Each analog ground return should
connect to the star point with separate traces.
Table 9. CRITICAL SIGNALS
VBAT
VREG, VDBL
AGND
VDDC
GNDC
VDDO
VDDO_SPI
GNDO
AI0/LOUT0,
AI1/LOUT1,
AI2/LOUT2,
AI3/LOUT3, AI4
RCVR+, RCVR−,
RCVR_HP+,
RCVR_HP−
GNDRCVR
EXT_CLK
The DGND plane is used as the ground return for digital
For details on which signals require special design
In some designs, space constraints may make separate
Pin Name
Power supply
Internal regulator for
analog sections
Analog ground return
Internal regulator for digital core
Digital ground return
Digital I/O power
Supply for SPI interface I/O
Digital ground return
Audio inputs
Direct digital audio output
Output stage ground return
External clock input / internal
clock output
Description
http://onsemi.com
Place 1 mF (min) decoupling capacitor close to pin.
Connect negative terminal of capacitor to DGND plane.
Place separate 1 mF decoupling capacitors close to each pin.
Connect negative capacitor terminal to AGND.
Keep away from digital traces and output traces.
VREG may be used to generate microphone bias.
VDBL shall not be used to supply external circuitry.
Connect to AGND plane.
Place 10 mF decoupling capacitor close to pin.
Connect negative terminal of capacitor to DGND.
Connect to digital ground.
Connect to VDDC, unless the pad ring must use different voltage levels
Not available on WLCSP option (routed internally to VBAT)
Connect to VDDC, unless the SPI port must use different voltage levels
Not available on WLCSP option (routed internally to VBAT)
Connect to digital ground.
Not available on WLCSP option (routed internally to GNDC)
Keep as short as possible.
Keep away from all digital traces and audio outputs.
Avoid routing in parallel with other traces.
Connect unused inputs to AGND.
AI3/LOUT3 not available on WLCSP option
Keep away from analog traces, particularly audio inputs.
Corresponding traces should be of approximately the same length.
Ideally, route lines parallel to each other.
Connect to star point.
Keep away from all analog audio inputs.
Minimize trace length. Keep away from analog signals. If possible, sur-
round with digital ground.
10
Internal Power Supplies
separate digital (VDDC) and analog (VREG, VDBL)
regulated supplies. Each supply requires an external
decoupling capacitor, even if the supply is not used
externally. Decoupling capacitors should be placed as close
as possible to the power pads. The VDDC internal regulator
is a programmable power supply that allows the selection of
the lowest digital supply depending on the clock frequency
at which BelaSigna 300 will operate. See the Internal Digital
Supply Voltage section for more details on VDDC.
(VDDO and VDDO_SPI). On the WLCSP option, these two
pins are internally connected to the VBAT pin, whereas the
DFN package option considers these two pins as inputs. In
this case, they must be externally connected by the
application PCB.
Table 9. Non−critical signals are outlined in Table 10.
Power management circuitry in BelaSigna 300 generates
Two other supply pins are also available on BelaSigna 300
Further details on these critical signals are provided in
Routing Guideline

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