KMPC8548EVTAUJC Freescale Semiconductor, KMPC8548EVTAUJC Datasheet - Page 81

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KMPC8548EVTAUJC

Manufacturer Part Number
KMPC8548EVTAUJC
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of KMPC8548EVTAUJC

Lead Free Status / Rohs Status
Supplier Unconfirmed
For each baud rate at which an LP-serial transmitter is specified to operate, the output eye pattern of the
transmitter shall fall entirely within the unshaded portion of the transmitter output compliance mask shown
in
the device is driving a 100-Ω ± 5% differential resistive load. The output eye pattern of an LP-serial
Freescale Semiconductor
Output voltage
Differential output voltage
Deterministic jitter
Total jitter
Multiple output skew
Unit interval
Output voltage
Differential output voltage
Deterministic jitter
Total jitter
Multiple output skew
Unit interval
Figure 52
Characteristic
Characteristic
with the parameters specified in
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 7
Table 60. Long Run Transmitter AC Timing Specifications—3.125 GBaud
Table 59. Long Run Transmitter AC Timing Specifications—2.5 GBaud
Symbol
Symbol
V
V
DIFFPP
DIFFPP
S
S
V
V
J
J
J
UI
J
UI
MO
MO
D
D
O
T
O
T
–0.40
–0.40
Min
800
400
Min
800
320
Range
Range
Table 61
1600
1000
1600
1000
Max
2.30
0.17
0.35
Max
2.30
0.17
0.35
400
320
when measured at the output pins of the device and
mVp-p
mVp-p
UI p-p
UI p-p
UI p-p
UI p-p
Unit
Unit
ps
ps
ps
ps
V
V
Voltage relative to COMMON of either signal
comprising a differential pair
Skew at the transmitter output between lanes of a
multilane link
±100 ppm
Voltage relative to COMMON of either signal
comprising a differential pair
Skew at the transmitter output between lanes of a
multilane link
±100 ppm
Notes
Notes
Serial RapidIO
81

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