DS21554LB+ Maxim Integrated Products, DS21554LB+ Datasheet - Page 90

• Manufacturer Part Number: DS21554LB+
• Description: IC TXRX E1 5V 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21554LB+

• Function: Single-Chip Transceiver
• Interface: E1, HDLC, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: Remote and AIS Alarm Detector / Generator
• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 1.544 Mbps
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Supply Current (max): 75 mA (Typ)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Ic Interface Type: Parallel, Serial
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 100
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

16.
The
SAMPLE/PRELOAD, BYPASS, and EXTEST. Optional public instructions included are HIGHZ,
CLAMP, and IDCODE. See
Standard Test Access Port and Boundary Scan Architecture.
The DS21354/DS21554 are enhanced versions of the DS2152 and are backward pin compatible. The
JTAG feature uses pins that had no function in the DS2152. When using the JTAG feature, be sure FMS
(pin 76) is tied low, enabling the newly defined pins of the DS21354/DS21554. Details on Boundary
Scan Architecture and the Test Access Port can be found in IEEE 1149.1-1990, IEEE 1149.1a-1993, and
IEEE 1149.1b-1994.
The Test Access Port has the necessary interface pins: JTRST, JTCLK, JTMS, JTDI, and JTDO. See the
pin descriptions in Section
DS21354/DS21554
JTAG BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT
Test Access Port (TAP)
TAP Controller
Instruction Register
3
for details.
Figure
IEEE
16-1. The device contains the following as required by IEEE 1149.1
1149.1
design
90 of 124
supports
Bypass Register
Boundary Scan Register
Device Identification Register
the
standard
instruction
codes