AD7356 Analog Devices, AD7356 Datasheet
AD7356
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AD7356 Summary of contents
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... High Throughput with Low Power Consumption. The AD7356 offers a 5 MSPS throughput rate with 36 mW power consumption Conversion Latency. The AD7356 features two standard successive approx- imation ADCs with accurate control of the sampling instant via a CS input and, once off, conversion control ...
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... Driving Differential Inputs ....................................................... 13 Voltage Reference ....................................................................... 14 ADC Transfer Function............................................................. 14 Modes of Operation ....................................................................... 15 Normal Mode.............................................................................. 15 Partial Power-Down Mode ....................................................... 15 Full Power-Down Mode ............................................................ 16 Power-Up Times......................................................................... 17 Power vs. Throughput Rate....................................................... 17 Serial Interface ................................................................................ 18 Application Hints ........................................................................... 19 Grounding and Layout .............................................................. 19 Evaluating the AD7356 Performance ...................................... 19 Outline Dimensions ....................................................................... 20 Ordering Guide .......................................................................... 20 Rev Page ...
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... When in track mode pF When in hold mode V mA When in reference overdrive mode V 2.048 V ± 0.5% max @ V = 2.5 V ± 2.048 V ± 0.25% max @ V = 2.5 V ± 5% and 25°C DD ppm/°C ppm For 1000 hours ppm μV rms Ω AD7356 1 , unless MAX and IN+ DD are IN− ...
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... AD7356 Parameter LOGIC INPUTS Input High Voltage (V ) INH Input Low Voltage (V ) INL Input Current (I ) IN) Input Capacitance ( LOGIC OUTPUTS Output High Voltage ( Output Low Voltage ( Floating-State Leakage Current Floating-State Output Capacitance Output Coding CONVERSION RATE Conversion Time 2 Track-and-Hold Acquisition Time ...
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... CS rising edge to falling edge pulse width ns min SCLK falling edge to SDATA ns max SCLK falling edge to SDATA and SDATA . A B Rev Page unless otherwise noted. MIN and SDATA are three-state disabled A B high impedance SDATA high impedance SDATA high impedance A B AD7356 ...
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... AD7356 ABSOLUTE MAXIMUM RATINGS Table 4. Parameter V to AGND, DGND, REFGND AGND, DGND, REFGND DRIVE DRIVE AGND to DGND to REFGND Analog Input Voltages 1 to AGND 2 Digital Input Voltages to DGND 3 Digital Output Voltages to DGND Input Current to Any Pin Except Supply Pins ...
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... ADCs. The data stream consists of two leading zeros followed by the 12 bits of conversion data. The data is provided MSB first held low for 16 SCLK cycles rather than 14 on the AD7356, then two trailing zeros appear after the 12 bits of data held low for a further 16 SCLK cycles on either SDATA or SDATA data from the other ADC follows on the SDATA pins ...
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... AD7356 TYPICAL PERFORMANCE CHARACTERISTICS 0 –20 –40 –60 –80 –100 –120 0 250 500 750 1000 1250 1500 1750 2000 2249 2499 FREQUENCY (kHz) Figure 3. Typical FFT 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 500 1000 1500 2000 2500 CODE Figure 4. Typical DNL Error 1.0 0.8 0.6 0.4 0.2 0 –0.2 – ...
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... DNL MIN –0.6 –1.0 2.10 2.15 2.20 2.25 2.30 2.35 EXTERNAL V (V) REF Figure 11. Linearity Error vs. External V 1.8 2500 3000 1 2.40 2.45 2.50 REF Rev Page AD7356 +125°C +85°C +25°C –40°C 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 V (V) DRIVE Figure 12. Access Time vs. V DRIVE +125°C +85°C +25°C –40°C 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 V ...
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... AD7356 TERMINOLOGY Integral Nonlinearity (INL) INL is the maximum deviation from a straight line passing through the endpoints of the ADC transfer function. The endpoints of the transfer function are zero scale (1 LSB below the first code transition) and full scale (1 LSB above the last code transition) ...
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... The AD7356 is tested using the CCIF standard where two input frequencies near the top end of the input bandwidth are used. In this case, the second-order terms are usually distanced in ...
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... ANALOG INPUT STRUCTURE Figure 16 shows the equivalent circuit of the analog input structure of the AD7356. The four diodes provide ESD protection for the analog inputs. Care must be taken to ensure that the analog input signals never exceed the supply rails by more than 300 mV. ...
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... CM is rejected, resulting in a virtually 2000 2500 noise-free signal of amplitude, –V to the digital codes 4095 for the AD7356. DRIVING DIFFERENTIAL INPUTS Differential operation requires V simultaneously with two equal signals that are 180° out of phase. Because not all applications have a signal preconditioned for differential operation, there is often a need to perform a single- ended-to-differential conversion ...
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... Op Amp Pair An op amp pair can be used to directly couple a differential signal to one of the analog input pairs of the AD7356. The circuit configurations shown in Figure 21 and Figure 22 show how an op amp pair can be used to convert a single-ended signal into a differential signal for a bipolar and unipolar input signal, respectively ...
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... CS line. Although the device may begin to power up on the falling edge powers down again on the rising edge the AD7356 is already in partial power-down mode and CS is brought high between the second and 10 falling edges of SCLK, the device enters full power-down mode. ...
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... This mode is more suited to applications in which a series of conversions performed at a relatively high throughput rate are followed by a long period of inactivity and, thus, power- down. When the AD7356 is in full power-down mode, all analog circuitry is powered down including the on-chip reference and reference buffers. Full power-down mode is ...
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... SCLK edge that the part receives after the falling edge When power supplies are first applied to the AD7356, the ADC can power up in either of the power-down modes or in normal mode. Because of this best to allow a dummy cycle to elapse to ensure that the part is fully powered up before attempting a valid conversion ...
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... A minimum of 14 serial clock cycles is required to perform the conversion process and to access data from one conversion on either data line of the AD7356. CS falling low provides the leading zero to be read in by the microcontroller or DSP. The remaining data is then clocked out by subsequent SCLK falling edges, beginning with a second leading zero ...
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... Allow the analog ground planes to run under the AD7356 to avoid noise coupling. The power supply lines to the AD7356 should use as large a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. ...
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... Model Notes Temperature Range AD7356BRUZ −40°C to +85°C AD7356BRUZ-500RL7 −40°C to +85°C AD7356BRUZ-RL −40°C to +85°C AD7356YRUZ −40°C to +125°C AD7356YRUZ-500RL7 −40°C to +125°C AD7356YRUZ-RL −40°C to +125°C EVAL-AD7356EDZ 2 3 EVAL-CED1Z RoHS Compliant Part. 2 This evaluation board can be used as a standalone evaluation board or in conjunction with the EVAL-CED1Z board for evaluation/demonstration purposes ...