AD7321 Analog Devices, AD7321 Datasheet

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AD7321

Manufacturer Part Number
AD7321
Description
500 kSPS, 2-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7321

Resolution (bits)
13bit
# Chan
2
Sample Rate
500kSPS
Interface
Ser,SPI
Analog Input Type
Diff-Uni,SE-Uni
Ain Range
Bip 10V,Bip 2.5V,Bip 5.0V,Uni 10V
Adc Architecture
SAR
Pkg Type
SOP

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FEATURES
12-bit plus sign SAR ADC
True bipolar input ranges
Software-selectable input ranges
500 kSPS throughput rate
2 analog input channels with channel sequencer
Single-ended, true differential, and pseudo differential
High analog input impedance
Low power: 18 mW
Full power signal bandwidth: 22 MHz
Internal 2.5 V reference
High speed serial interface
Power-down modes
14-lead TSSOP package
iCMOS™ process technology
GENERAL DESCRIPTION
The AD7321
approximation ADC designed on the iCMOS (industrial
CMOS) process. iCMOS is a process combining high voltage
silicon with submicron CMOS and complementary bipolar
technologies. It enables the development of a wide range of high
performance analog ICs capable of 33 V operation in a footprint
that no previous generation of high voltage parts could achieve.
Unlike analog ICs using conventional CMOS processes, iCMOS
components can accept bipolar input signals while providing
increased performance, dramatically reduced power consumption,
and reduced package size.
The AD7321 can accept true bipolar analog input signals. The
AD7321 has four software-selectable input ranges, ±10 V, ±5 V,
±2.5 V, and 0 V to +10 V. Each analog input channel is indepen-
dently programmed to one of the four input ranges. The analog
input channels on the AD7321 are programmed to be single-ended,
true differential, or pseudo differential.
The ADC contains a 2.5 V internal reference. The AD7321 also
allows for external reference operation. If a 3 V reference is applied
to the REFIN/OUT pin, the AD7321 can accept a true bipolar
±12 V analog input. A minimum of ±12 V V
are required for the ±12 V input range. The ADC has a high speed
serial interface that can operate at throughput rates up to 500 kSPS.
1
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Protected by U.S. Patent No. 6,731,232.
analog input capability
±10 V, ±5 V, ±2.5 V, 0 V to +10 V
1
is a 2-channel, 12-bit plus sign successive
DD
500 kSPS, 2-Channel, Software-Selectable,
and V
True Bipolar Input, 12-Bit Plus Sign ADC
SS
supplies
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
Table 1. Similar Devices
Device
Number
AD7329
AD7328
AD7327
AD7324
AD7323
AD7322
V
V
IN
IN
0
1
The AD7321 can accept true bipolar analog input signals,
±10 V, ±5 V, ±2.5 V, and 0 V to +10 V unipolar signals.
The two analog inputs are configured as two single-ended
inputs, one true differential input pair, or one pseudo
differential input.
A 500 kSPS serial interface. SPI®-/QSPI™-/DSP-/
MICROWIRE™-compatible interface.
Low power, 18 mW, at a maximum throughput rate of
500 kSPS.
Channel sequencer.
AD7321
SEQUENCER
CHANNEL
AGND
MUX
I/P
Throughput
Rate
1000 kSPS
1000 kSPS
500 kSPS
1000 kSPS
500 kSPS
1000 kSPS
FUNCTIONAL BLOCK DIAGRAM
©2006–2009 Analog Devices, Inc. All rights reserved.
V
V
T/H
DD
SS
Number of bits
12-bit plus sign
12-bit plus sign
12-bit plus sign
12-bit plus sign
12-bit plus sign
12-bit plus sign
Figure 1.
VREF
2.5V
REFIN/OUT
DGND
APPROXIMATION
SUCCESSIVE
CONTROL LOGIC
AND REGISTERS
13-BIT
ADC
V
CC
AD7321
www.analog.com
Number of
Channels
8
8
8
4
4
2
DOUT
SCLK
CS
DIN
V
DRIVE

Related parts for AD7321

AD7321 Summary of contents

Page 1

... The ADC contains a 2.5 V internal reference. The AD7321 also allows for external reference operation reference is applied to the REFIN/OUT pin, the AD7321 can accept a true bipolar ±12 V analog input. A minimum of ± are required for the ±12 V input range. The ADC has a high speed serial interface that can operate at throughput rates up to 500 kSPS ...

Page 2

... Sequencer Operation ..................................................................... 26 Reference ..................................................................................... 27 V ............................................................................................ 27 DRIVE Modes of Operation ....................................................................... 28 Normal Mode .............................................................................. 28 Full Shutdown Mode .................................................................. 28 Autoshutdown Mode ................................................................. 29 Autostandby Mode ..................................................................... 29 Power vs. Throughput Rate ....................................................... 30 Serial Interface ................................................................................ 31 Microprocessor Interfacing ........................................................... 32 AD7321 to ADSP-21xx .............................................................. 32 AD7321 to ADSP-BF53x ........................................................... 32 Application Hints ........................................................................... 33 Layout and Grounding .............................................................. 33 Power Supply Configuration .................................................... 33 Outline Dimensions ....................................................................... 34 Ordering Guide .......................................................................... 34 Rev Page ...

Page 3

... Single-ended/pseudo differential mode: ±2.5 V range dB Single-ended/pseudo differential mode +10 V and ±10 V ranges kHz kHz 100 kHz ripple frequency: see Figure unselected channels up to 100 kHz: see IN Figure 14 MHz MHz At 0.1 dB AD7321 < CC ...

Page 4

... AD7321 1 Parameter Min 4 DC ACCURACY Resolution 13 No Missing Codes 12-bit plus sign (13 bits) 11-bit plus sign (12 bits) 2 Integral Nonlinearity Differential Nonlinearity Offset Error 2, 5 Offset Error Match 2, 5 Gain Error 2, 5 Gain Error Match Positive Full-Scale Error 2, 6 Positive Full-Scale Error ...

Page 5

... V 0.8 V 0.4 V ±1 μ 0.4 V ±1 μ Straight natural binary Twos complement Rev Page AD7321 Test Conditions/Comments Reference = 2.5 V; see Table min −10 V min 2 5. min −5 V min 2 5. min − ...

Page 6

... AD7321 1 Parameter Min CONVERSION RATE Conversion Time Track-and-Hold Acquisition Time 2, 3 Throughput Rate POWER REQUIREMENTS − 2 2.7 DRIVE Normal Mode (Static) Normal Mode (Operational and I CC DRIVE Autostandby Mode (Dynamic and I CC DRIVE Autoshutdown Mode (Static) ...

Page 7

... DB11 DB10 DB2 t 10 REG MSB SEL Figure 2. Serial Interface Timing Diagram Rev Page 2 3.0 V internal/external, REF and timed from a voltage level of 1.6 V. DRIVE QUIET DB1 DB0 THREE-STATE DON’T LSB CARE AD7321 ...

Page 8

... ESD 1 If the analog inputs are driven from alternative V Schottky diodes should be placed in series with the V the AD7321. See the Application Hints section. 2 Transient currents 100 mA do not cause SCR latch-up. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only ...

Page 9

... V Positive Power Supply Voltage. This is the positive supply voltage for the analog input section Analog Supply Voltage, 2 5.25 V. This is the supply voltage for the ADC core on the AD7321. CC This supply should be decoupled to AGND Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the interface DRIVE operates ...

Page 10

... AD7321 TYPICAL PERFORMANCE CHARACTERISTICS 0 4096 POINT FFT – 25°C A INT/EXT 2.5V REFERENCE –40 ±10V RANGE F = 50kHz IN SNR = 77.30dB –60 SINAD = 76.85dB THD = –86.96dB SFDR = –88.22dB –80 –100 –120 –140 0 50 100 150 FREQUENCY (kHz) Figure 4. FFT True Differential Mode ...

Page 11

... Figure 14. Channel-to-Channel Isolation 10k 9469 RANGE = ±10V 8k 10k SAMPLES T = 25° 228 303 0 0 –2 – CODE Figure 15. Histogram of Codes, True Differential Mode AD7321 ±5V SE ±2.5V SE ±10V DIFF = 5V 1000 500 600 = 5V = ±12V ...

Page 12

... AD7321 8k 7600 1201 1165 –3 –2 –1 0 CODE Figure 16. Histogram of Codes, Single-Ended Mode –50 –55 –60 –65 – –75 – –85 DIFFERENTIAL MODE – 500kSPS S T –95 A –100 0 200 400 600 RIPPLE FREQUENCY (kHz) Figure 17 ...

Page 13

... Figure 22. THD vs. Analog Input Frequency for Various Source Impedances, Single-Ended Mode ±10V RANGE R = 4000Ω 2000Ω 1000Ω 100Ω 50Ω IN ±2.5V RANGE R = 4700Ω 3000Ω 1000Ω 100Ω 50Ω IN 1000 Rev Page AD7321 ...

Page 14

... N-bit converter with a sine wave input is given by Signal to (Noise + Distortion) = (6. 1.76) dB For a 13-bit converter, this is 80.02 dB. Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the rms sum of harmonics to the fundamental. For the AD7321 it is defined as where sixth harmonics. ...

Page 15

... Figure 14 shows the worst- case across all eight channels for the AD7321. The analog input range is programmed to be the same on all channels. Intermodulation Distortion ...

Page 16

... These supplies must be equal to or greater than the largest analog input range selected. See Table 6 for the requirements of these supplies for each analog input range. The AD7321 requires a low voltage 2 5. power the ADC core. Table 6. Reference and Supply Requirements for Each ...

Page 17

... The analog inputs of the AD7321 are configured as single- ended, true differential, or pseudo differential via the control register mode bits (see Table 9). The AD7321 can accept true bipolar input signals. On power-up, the analog inputs operate as two single-ended analog input channels. If true differential or pseudo differential is required, a write to the control register is necessary after power-up to change this configuration ...

Page 18

... SOURCE where C is the sampling capacitance and R is the resistance seen by the track-and-hold amplifier looking back on the input. For the AD7321, the value of R includes the on resistance of the input multiplexer and is typically 300 Ω. R any extra source impedance on the analog input. ...

Page 19

... RANGE SELECTED. Figure 32. Typical Connection Diagram ANALOG INPUT Single-Ended Inputs The AD7321 has a total of two analog inputs when operating the AD7321 in single-ended mode. Each analog input is independently programmed to one of the four analog input ranges. In applications where the signal source is high impedance recommended to buffer the signal before applying it to the ADC analog inputs ...

Page 20

... IN in the pseudo differential mode For example, when the AD7321 is configured to operate in pseudo differential mode and the ±5 V range is selected with ±16 pin can vary from −6 +6.5 V. Rev Page ± ...

Page 21

... AD7321 can handle source impedances 5.5 kΩ before the THD starts to degrade. Due to the programmable nature of the analog inputs on the AD7321, the choice of op amp used to drive the inputs is a function of the particular application and depends on the input configuration and the analog input voltage ranges selected. ...

Page 22

... ADDRESSING REGISTERS A serial transfer on the AD7321 consists of 16 SCLK cycles. The three MSBs on the DIN line during the 16 SCLK transfer are decoded to determine which register is addressed. The three MSBs consist of the write bit, a ZERO bit, and the register select bit. The register select bit is used to determine which of the two on-board registers is selected ...

Page 23

... The control register is used to select the analog input channel, analog input configuration, reference, coding, and power mode. The control register is a write only, 12-bit register. Data loaded on the DIN line corresponds to the AD7321 configuration for the next conversion. Data should be loaded into the control register after the range register has been initialized. The bit functions of the control register are shown in Table 9 (the power-up status of all bits is 0) ...

Page 24

... PM1 PM0 Description 1 1 Full Shutdown Mode. In this mode, all internal circuitry on the AD7321 is powered down. Information in the control register is retained when the AD7321 is in full shutdown mode Autoshutdown Mode. The AD7321 enters autoshutdown on the 15 All internal circuitry is powered down in autoshutdown. ...

Page 25

... After the initial write to the range register occurs, each time an analog input is selected, the AD7321 automatically configures the analog input to the appropriate range, as indicated by the range register. The ±10 V input range is selected by default on each analog input channel (see Table 13). ...

Page 26

... Channel 0 and ends with a final channel as selected by Bit ADD0 in the control register. In this configuration, there is no need for a write to the sequence register. To operate the AD7321 in this mode, set Seq1 to 1 and Seq2 to 0, and then select the final channel in the sequence by programming Bit ADD0 in the control register ...

Page 27

... The AD7321 is specified for a 2 reference range. When reference is selected, the ranges are ±12 V, ±6 V, ±3 V, and +12 V. For these ranges, the V must be equal to or greater than the maximum analog input range selected (see Table 6) ...

Page 28

... NORMAL MODE (PM1 = PM0 = 0) This mode is intended for the fastest throughput rate performance with the AD7321 being fully powered up at all times. Figure 45 shows the general operation of the AD7321 in normal mode. The conversion is initiated on the falling edge and the track-and-hold section enters hold mode as described in the Serial Interface section ...

Page 29

... The t is required before a valid conversion, initiated POWER-UP by bringing the CS signal low, can take place. Once this valid conversion is complete, the AD7321 powers down again on the th SCLK rising edge. The CS signal must remain low again to 15 keep the part in autoshutdown mode. ...

Page 30

... AD7321 POWER VS. THROUGHPUT RATE The power consumption of the AD7321 varies with throughput rate. The static power consumed by the AD7321 is very low, and significant power savings is achieved as the throughput rate is reduced. Figure 48 and Figure 49 shows the power vs. throughput rate for the AD7321 respectively ...

Page 31

... WRITE ZERO DIN Data is clocked into the AD7321 on the SCLK falling edge. The three MSBs on the DIN line are decoded to select which register is being addressed. The control register is a 12-bit register. If the control register is addressed by the three MSBs, the data on the DIN line is loaded into the control on the 15 edge ...

Page 32

... AD7321 MICROPROCESSOR INTERFACING The serial interface on the AD7321 allows the part to be directly connected to a range of different microprocessors. This section explains how to interface the AD7321 with some common microcontroller and DSP serial interface protocols. AD7321 TO ADSP-21xx The ADSP-21xx family of DSPs interface directly to the AD7321 without requiring glue logic ...

Page 33

... All AGND pins on the AD7321 should be connected to the AGND plane. Digital and analog ground pins should be joined in only one place. If the AD7321 system where multiple devices require an AGND and DGND connection, the connection should still be made at only one point ...

Page 34

... This board is a complete unit allowing control and communicate with all Analog Devices evaluation boards ending in the CB designators. To order a complete evaluation kit, the particular ADC evaluation board (for example, EVAL-AD7321CB), the EVAL-CONTROL BRD2, and transformer must be ordered. See the relevant evaluation board technical note for more information ...

Page 35

... NOTES Rev Page AD7321 ...

Page 36

... AD7321 NOTES ©2006–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05399-0-10/09(A) Rev Page ...

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