AD7321 Analog Devices, AD7321 Datasheet - Page 9

• Manufacturer Part Number: AD7321
• Description: 500 kSPS, 2-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC
• Manufacturer: Analog Devices

Specifications of AD7321

• Resolution (bits): 13bit
• # Chan: 2
• Sample Rate: 500kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: Bip 10V,Bip 2.5V,Bip 5.0V,Uni 10V
• Adc Architecture: SAR
• Pkg Type: SOP

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Descriptions
Pin No.
1
2
3, 13
4
5
6
7, 8
9
10
11
12
14
Mnemonic
CS
DIN
DGND
AGND
REFIN/OUT
V
V
V
V
V
DOUT
SCLK
SS
IN
DD
CC
DRIVE
0 to V
IN
1
Description
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on
the AD7321 and frames the serial data transfer.
Data In. Data to be written to the on-chip registers is provided on this input and is clocked into the
register on the falling edge of SCLK (see the Registers section).
Digital Ground. Ground reference point for all digital circuitry on the AD7321. The DGND and AGND
voltages ideally should be at the same potential and must not be more than 0.3 V apart, even on a
transient basis.
Analog Ground. Ground reference point for all analog circuitry on the AD7321. All analog input signals
and any external reference signal should be referred to this AGND voltage. The AGND and DGND
voltages ideally should be at the same potential and must not be more than 0.3 V apart, even on a
transient basis.
Reference Input/Reference Output. The on-chip reference is available on this pin for external use to the
AD7321. The nominal internal reference voltage is 2.5 V, which appears at this pin. A 680 nF capacitor
should be placed on the reference pin (see the Reference section). Alternatively, the internal reference
is disabled, and an external reference is applied to this input. On power-up, the external reference
mode is the default condition.
Negative Power Supply Voltage. This is the negative supply voltage for the analog input section.
Analog Input 0 to Analog Input 1. The analog inputs are multiplexed into the on-chip track-and-hold.
The analog input channel for conversion is selected by programming the Channel Address Bit ADD0 in
the control register. The inputs are configured as two single-ended inputs, one true differential input
pair, or one pseudo differential input. The configuration of the analog inputs is selected by programming the
mode bits, Bit Mode 1 and Bit Mode 0, in the control register. The input range on each input channel is
controlled by programming the range register. Input ranges of ±10 V, ±5 V, ±2.5 V, and 0 V to +10 V are
selected on each analog input channel when a +2.5 V reference voltage is used (see the Registers section).
Positive Power Supply Voltage. This is the positive supply voltage for the analog input section.
Analog Supply Voltage, 2.7 V to 5.25 V. This is the supply voltage for the ADC core on the AD7321.
This supply should be decoupled to AGND.
Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the interface
operates. This pin should be decoupled to DGND. The voltage at this pin may be different to that at V
but it should not exceed V
Serial Data Output. The conversion output data is supplied to this pin as a serial data stream. The bits
are clocked out on the falling edge of the SCLK input, and 16 SCLKs are required to access the data. The
data stream consists of two ZERO bits, a channel identification bit, the sign bit, and 12 bits of conversion
data. The data is provided MSB first (see the Serial Interface section).
Serial Clock, Logic Input. A serial clock input provides the SCLK used for accessing the data from the
AD7321. This clock is also used as the clock source for the conversion process.
REFIN/OUT
DGND
AGND
V
DIN
V
CS
IN
Figure 3. Pin Configuration
SS
0
Rev. A | Page 9 of 36
1
2
3
4
5
6
7
CC
(Not to Scale)
by more than 0.3 V.
TOP VIEW
AD7321
14
13
12
11
10
9
8
SCLK
DGND
DOUT
V
V
V
V
DRIVE
CC
DD
IN
1
AD7321
CC
,