AD7938 Analog Devices, AD7938 Datasheet - Page 19

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AD7938

Manufacturer Part Number
AD7938
Description
8-Channel, 1.5 MSPS, 12-Bit Parallel ADCs with a Sequencer
Manufacturer
Analog Devices
Datasheet

Specifications of AD7938

Resolution (bits)
12bit
# Chan
8
Sample Rate
1.5MSPS
Interface
Byte,Par
Analog Input Type
Diff-Uni,SE-Uni
Ain Range
(2Vref) p-p,5V p-p,Uni (Vref),Uni (Vref) x 2,Uni 2.5V,Uni 5.0V
Adc Architecture
SAR
Pkg Type
CSP,QFP

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Data Sheet
TYPICAL CONNECTION DIAGRAM
Figure 19 shows a typical connection diagram for the
AD7938/AD7939. The AGND and DGND pins are connected
together at the device for good noise suppression. The
V
capacitor to avoid noise pickup if the internal reference is used.
Alternatively, V
reference source. In this case, the reference pin should be
decoupled with a 0.1 μF capacitor. In both cases, the analog
input range can either be 0 V to V
2 × V
be either eight single-ended inputs, four differential pairs, four
pseudo differential pairs, or seven pseudo differential inputs
(see Table 10). The V
supply. The voltage applied to the V
voltage of the digital interface. Here, it is connected to the same
3 V supply of the microprocessor to allow a 3 V logic interface
(see the Digital Inputs section).
0 TO 2 × V
REFIN
0 TO V
V
2.5V
REF
011...111
011...110
000...001
000...000
111...111
100...010
100...001
100...000
/V
REF
with Twos Complement Output Coding and 2 × V
REFOUT
(RANGE bit = 1). The analog input configuration can
Figure 18. AD7938/AD7939 Ideal Transfer Characteristic
REF
REF
/
pin is decoupled to AGND with a 0.47 μF
V
V
V
AGND
DGND
V
REFIN
Figure 19. Typical Connection Diagram
DD
IN
IN
REFIN
0
7
0.1µF
–V
REF
/V
/V
AD7938/AD7939
1 LSB = 2 × V
1 LSB = 2 × V
DD
+
REFOUT
REFOUT
+ 1 LSB
0.1µF EXTERNAL V
0.47µF INTERNAL V
+
pin is connected to either a 3 V or 5 V
10µF
can be connected to an external
+
REF
REF
DB11/DB9
V
CONVST
3V/5V
SUPPLY
REF
/4096 (AD7938)
/1024 (AD7939)
V
CLKIN
REF
BUSY
DRIVE
W/B
DB0
DRIVE
WR
RD
CS
(RANGE bit = 0) or 0 V to
REF
REF
input controls the
0.1µF
+V
REF
+
REF
– 1 LSB
+
Range
10µF
SUPPLY
3V
Rev. C | Page 19 of 36
ANALOG INPUT STRUCTURE
Figure 20 shows the equivalent circuit of the analog input
structure of the AD7938/AD7939 in differential/pseudo
differential mode. In single-ended mode, V
tied to AGND. The four diodes provide ESD protection for the
analog inputs. Care must be taken to ensure that the analog
input signals never exceed the supply rails by more than
300 mV. Doing so causes these diodes to become forward-
biased and start conducting into the substrate. These diodes can
conduct up to 10 mA without causing irreversible damage to
the part.
The C1 capacitors in Figure 20 are typically 4 pF and can
primarily be attributed to pin capacitance. The resistors are
lumped components made up of the on resistance of the
switches. The value of these resistors is typically about 100 Ω.
The C2 capacitors are the sampling capacitors of the ADC and
typically have a capacitance of 45 pF.
For ac applications, removing high frequency components from
the analog input signal is recommended by the use of an RC
low-pass filter on the relevant analog input pins. In applications
where harmonic distortion and signal-to-noise ratio are critical,
the analog input should be driven from a low impedance
source. Large source impedances significantly affect the ac
performance of the ADC. This may necessitate the use of an
input buffer amplifier. The choice of the op amp is a function of
the particular application.
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of THD that can be
tolerated. The THD increases as the source impedance increases
and performance degrades. Figure 21 and Figure 22 show a
graph of the THD vs. source impedance with a 50 kHz input
tone for both V
differential mode, respectively.
Conversion Phase: Switches Open, Track Phase: Switches Closed
V
V
IN+
Figure 20. Equivalent Analog Input Circuit,
IN–
DD
= 5 V and 3 V in single-ended mode and fully
C1
C1
V
V
DD
DD
D
D
D
D
AD7938/AD7939
R1
R1
IN−
C2
C2
is internally

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