AD7938 Analog Devices, AD7938 Datasheet - Page 25

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AD7938

Manufacturer Part Number
AD7938
Description
8-Channel, 1.5 MSPS, 12-Bit Parallel ADCs with a Sequencer
Manufacturer
Analog Devices
Datasheet

Specifications of AD7938

Resolution (bits)
12bit
# Chan
8
Sample Rate
1.5MSPS
Interface
Byte,Par
Analog Input Type
Diff-Uni,SE-Uni
Ain Range
(2Vref) p-p,5V p-p,Uni (Vref),Uni (Vref) x 2,Uni 2.5V,Uni 5.0V
Adc Architecture
SAR
Pkg Type
CSP,QFP

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Data Sheet
PARALLEL INTERFACE
The AD7938/AD7939 have a flexible, high speed, parallel
interface. This interface is 12-bits (AD7938) or 10-bits
(AD7939) wide and is capable of operating in either word
(W/ B tied high) or byte (W/ B tied low) mode. The CONVST
signal is used to initiate conversions; when operating in
autoshutdown or autostandby mode, it is used to initiate
power-up.
A falling edge on the CONVST signal is used to initiate
conversions and it puts the ADC track-and-hold into track.
Once the CONVST signal goes low, the BUSY signal goes high
for the duration of the conversion. In between conversions,
CONVST must be brought high for a minimum time of t
must happen after the 14
conversion is aborted and the track-and-hold goes back into track.
TRACK/HOLD
DB0 TO DB11
DB0 TO DB11
INTERNAL
CONVST
CLKIN
BUSY
Figure 36. AD7938/AD7939 Parallel Interface—Conversion and Read Cycle Timing in Word Mode (W/ B = 1)
th
falling edge of CLKIN; otherwise, the
RD
CS
WITH CS AND RD TIED LOW
t
2
t
3
1
2
THREE-STATE
OLD DATA
3
4
1
. This
t
CONVERT
Rev. C | Page 25 of 36
5
12
A
At the end of the conversion, BUSY goes low and can be used to
activate an interrupt service routine. The CS and RD lines are
then activated in parallel to read the 12- or 10-bits of conversion
data. When power supplies are first applied to the device, a
rising edge on CONVST is necessary to put the track-and-hold
into track. The acquisition time of 125 ns minimum must be
allowed before CONVST is brought low to initiate a conversion.
The ADC then goes into hold on the falling edge of CONVST
and back into track on the 13
(see Figure 36). When operating the device in autoshutdown or
autostandby mode, where the ADC powers down at the end of
each conversion, a rising edge on the CONVST signal is used to
power up the device.
13
t
B
10
t
9
14
t
20
t
13
t
12
t
DATA
DATA
ACQUISITION
t
1
THREE-STATE
t
t
11
14
th
t
QUIET
rising edge of CLKIN after this
AD7938/AD7939

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