CS8420-DSZ Cirrus Logic Inc, CS8420-DSZ Datasheet - Page 25

• Manufacturer Part Number: CS8420-DSZ
• Description: IC CONV S/R DGTL AUDIO 28-SOIC
• Manufacturer: Cirrus Logic Inc
• Type: Sample Rate Converterr

Specifications of CS8420-DSZ

• Applications: Digital Audio
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC
• Audio Control Type: Sample Rate Converter
• Control Interface: 3 Wire, Serial
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: -40°C To +85°C
• Audio Ic Case Style: SOIC
• No. Of Pins: 28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1729

DS245F4
7.2.2
7.3
Mono Mode Operation
Currently, the AES3 standard is being updated to include options for 96-kHz sample rate operation. One
method is to double the frame rate of the current format. This results in a
96-kHz sample rate, stereo signal carried over a single twisted pair cable. An alternate method is where the
2 sub-frames in a 48-kHz frame rate AES3 signal are used to carry consecutive samples of a mono signal,
resulting in a 96-kHz sample rate stream. This allows older equipment, whose AES3 transmitters and re-
ceivers are not rated for 96-kHz frame rate operation, to handle 96-kHz sample rate information. In this
“mono mode”, 2 AES3 cables are needed for stereo data transfer. The CS8420 offers mono mode opera-
tion, both for the AES3 receiver and for the AES3 transmitter.
in comparison with normal stereo mode. The receiver and transmitter sections may be independently set to
mono mode via the MMR and MMT control bits.
The receiver mono mode effectively doubles Fsi compared to the input frame rate. The clock output on the
RMCK pin tracks Fsi, and so is doubled in frequency compared to stereo mode. In mono mode, A and B
sub-frames are routed to the SRC inputs as consecutive samples.
When the transmitter is in mono mode, either A or B SRC consecutive outputs are routed alternately to A
and B sub-frames in the AES3 output stream. Which channel status block is transmitted is also selectable.
For the AES3 input to serial audio port output data flow, in receiver mono mode, then the receiver will run
at a frame rate of Fsi/2, and the serial audio output port will run at Fsi. Identical data will appear in both left
and right data fields on the SDOUT pin.
For the serial audio input port to AES3 transmitter data flow, in transmitter mono mode, then the input port
will run at Fso audio sample rate, while the AES3 transmitter frame rate will be at Fso/2. The data from either
consecutive left, or right, positions will be selected for transmitting in A and B sub-frames.
TXN and TXP Drivers
The line drivers are low-skew, low-impedance, differential outputs capable of driving cables directly. Both
drivers are set to ground during reset (RST = low), when no AES3 transmit clock is provided, and option-
ally under the control of a register bit. The CS8420 also allows immediate mute of the AES3 transmitter
audio data via a control register bit.
External components are used to terminate and isolate the external cable from the CS8420. These com-
ponents are detailed in
page
78.
“External AES3/SPDIF/IEC60958 Transmitter and Receiver Components” on
Figure 21
shows the operation of mono mode
CS8420
25