TEF6890H/V2,557 NXP Semiconductors, TEF6890H/V2,557 Datasheet - Page 27

• Manufacturer Part Number: TEF6890H/V2,557
• Description: IC RADIO SIGNAL PROC 44-QFP
• Manufacturer: NXP Semiconductors
• Type: Car Signal Processorr

Specifications of TEF6890H/V2,557

• Applications: Automotive Audio
• Mounting Type: Surface Mount
• Package / Case: 44-MQFP, 44-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935272793557; TEF6890H/V2; TEF6890H/V2

Philips Semiconductors
Note
1. Data bytes 0, 1 and 3 must not be used in the application. All bits in these bytes must be set to logic 0.
11.2.1
Table 14 Format of data byte 2H with default setting
Table 15 Description of data byte 2H
Table 16 RDS clock description
11.2.2
Table 17 Format of data byte 4H with default setting
2003 Oct 21
Car radio integrated signal processor
SA4
7 and 6
0
1
1
1
1
1
CLKO
STBR
BIT 7
5 to 2
BIT 7
BIT
1
0
0
0
1
1
1
S
S
UBADDRESS
UBADDRESS
SA3
1
0
0
0
0
1
SYMBOL
TST[3:0]
CLKO
STBA
BIT 6
BIT 6
CLKI
CLKI
0
1
0
1
1
2H; RDSCLK
4H; CONTROL
SA2
1
0
0
0
0
1
Not used. Set to logic 0.
Test. TST[3:0] = 0000: normal operation.
Clock input or output and buffered or unbuffered raw RDS output. See Table 16.
reserved
RDCL is burst clock input for raw RDS read-out.
RDCL is clock output for raw RDS read-out.
reserved
SA1
1
0
0
1
1
1
AFUM
BIT 5
TST3
BIT 5
0
0
SA0
1
0
1
0
1
1
AFUH
BIT 4
TST2
BIT 4
HEX
0
0
1F
10
11
12
13
F
(1)
27
BASS
FADER
BALANCE
MIX
BEEP
AUTOGATE
MNEMONIC
RMUT
BIT 3
TST1
RDS/RBDS CLOCK
BIT 3
0
0
DESCRIPTION
bass control
fader control
balance control
control of output mixer
beep generator settings
autogate control
BIT 2
TST0
BIT 2
0
ADDRESSED DATA BYTE
CLKO
BIT 1
BIT 1
LETF
0
0
Product specification
TEF6890H
BIT 0
BIT 0
ATTB
CLKI
1
0