STM32F215VG STMicroelectronics, STM32F215VG Datasheet - Page 103

• Manufacturer Part Number: STM32F215VG
• Description: High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, HW crypto
• Manufacturer: STMicroelectronics

Specifications of STM32F215VG

• 10/100 Ethernet Mac With Dedicated Dma: supports IEEE 1588v2 hardware, MII/RMII

STM32F215xx, STM32F217xx
I
Unless otherwise specified, the parameters given in
are derived from tests performed under the ambient temperature, f
supply voltage conditions summarized in
Refer to
function characteristics (NSS, SCK, MOSI, MISO for SPI and WS, CK, SD for I
Table 50.
1. Remapped SPI1 characteristics to be determined.
2. Based on characterization, not tested in production.
3. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate
4. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put
2
DuCy(SCK)
t
t
t
dis(SO)
t
S - SPI interface characteristics
t
t
t
w(SCLH)
v(SO)
t
w(SCLL)
a(SO)
v(MO)
1/t
su(NSS)
t
Symbol
t
h(NSS)
t
t
t
su(MI)
t
h(MO)
the data.
the data in Hi-Z
su(SI)
h(MI)
h(SO)
t
t
h(SI)
r(SCL)
f
f(SCL)
c(SCK)
SCK
(2)(3)
(2)(1)
(2)(1)
(2)
(2)(4)
(2)
(2)
(2)
(2)
(2)
(2)
Section 5.3.16: I/O port characteristics
(2)
(2)
(2)
SPI characteristics
SPI clock frequency
SPI clock rise and fall
time
SPI slave input clock
duty cycle
NSS setup time
NSS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access
time
Data output disable
time
Data output valid time Slave mode (after enable edge)
Data output valid time Master mode (after enable edge)
Data output hold time
Parameter
Doc ID 17050 Rev 6
(1)
Master mode
Slave mode
Capacitive load: C = 30 pF
Slave mode
Slave mode
Slave mode
Master mode, f
presc = 2
Master mode
Slave mode
Master mode
Slave mode
Slave mode, f
Slave mode
Slave mode (after enable edge)
Master mode (after enable edge)
Table
Conditions
10.
for more details on the input/output alternate
PCLK
PCLK
= 20 MHz
Table 50
= 30 MHz,
for SPI or in
Electrical characteristics
PCLKx
4t
2t
t
PCLK
Min
PCLK
PCLK
30
15
5
5
5
4
2
2
-
-
-
-
-
0
frequency and V
-3 t
Table 51
PCLK
3t
Max
PCLK
30
70
10
25
2
30
-
-
-
8
-
-
-
-
5
-
S).
+3
for I
103/168
MHz
Unit
ns
ns
%
2
S
DD