STM32F215VG STMicroelectronics, STM32F215VG Datasheet - Page 50

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STM32F215VG

Manufacturer Part Number
STM32F215VG
Description
High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, HW crypto
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F215VG

10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII

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Pinouts and pin description
5. Main function after the first backup domain power-up. Later on, it depends on the contents of the RTC registers even after
6. FT = 5 V tolerant except when in analog mode or oscillator mode (for PC14, PC15, PH0 and PH1).
7. If the device is delivered in an UFBGA176 package and if the REGOFF pin is set to V
8. FSMC_NL pin is also named FSMC_NADV on memory devices.
9. RFU means “reserved for future use”. This pin can be tied to V
50/168
reset (because these registers are not reset by the main reset). For details on how to manage these I/Os, refer to the RTC
register description sections in the STM32F20x and STM32F21x reference manual, available from the STMicroelectronics
website: www.st.com.
as an internal Reset (active low).
Doc ID 17050 Rev 6
DD
,V
SS
or left unconnected.
DD
(Regulator OFF), then PA0 is used
STM32F215xx, STM32F217xx

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