ST72324BK2 STMicroelectronics, ST72324BK2 Datasheet - Page 52

• Manufacturer Part Number: ST72324BK2
• Description: 5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324BK2

• Hdflash Endurance: 1 kcycle at 55 °C, data retention 40 years at 85 °C
• Clock Sources: crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
• 4 Power Saving Modes: Slow, Wait, Active-halt, and Halt

Power saving modes
8
8.1
8.2
Note:
52/193
Power saving modes
Introduction
To give a large measure of flexibility to the application in terms of power consumption, four
main power saving modes are implemented in the ST7 (see
Wait), Active-halt and Halt.
After a reset the normal operating mode is selected by default (Run mode). This mode
drives the device (CPU and embedded peripherals) by means of a master clock which is
based on the main oscillator frequency divided or multiplied by 2 (f
From Run mode, the different power saving modes may be selected by setting the relevant
register bits or by calling the specific ST7 software instruction whose action depends on the
oscillator status.
Figure 23. Power saving mode transitions
Slow mode
This mode has two targets:
●
●
Slow mode is controlled by three bits in the MCCSR register: the SMS bit which enables or
disables Slow mode and two CPx bits which select the internal slow frequency (f
In this mode, the master clock frequency (f
and peripherals are clocked at this lower frequency (f
Slow-Wait mode is activated when entering the Wait mode while the device is already in
Slow mode.
To reduce power consumption by decreasing the internal clock in the device,
To adapt the internal clock frequency (f
Power consumption
Active Halt
Slow Wait
OSC2
CPU
Slow
Wait
Run
Halt
) to the available supply voltage.
) can be divided by 2, 4, 8 or 16. The CPU
Low
High
CPU
).
Figure
OSC2
23): Slow, Wait (Slow
).
ST72324Bxx
CPU
).