ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 189

• Manufacturer Part Number: ST7LITE49K2
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49K2

• 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10K write/erase cycles guaranteed Data retention
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow

ST7LITE49K2
12.2.1
Table 68.
Mnemo
CALLR
JRNM
BRES
BSET
JRNH
CALL
BTJF
BTJT
HALT
IRET
JRMI
JRIH
ADC
ADD
AND
BCP
DEC
JRIL
JRM
CLR
CPL
JRH
JRA
JRT
JRF
INC
CP
JP
Jump if ext. interrupt = 1
Jump if ext. interrupt = 0
Bit compare A, Memory
Call subroutine relative
Interrupt routine return
Jump if N = 1 (minus)
Jump if bit is false (0)
Jump relative always
Jump if bit is true (1)
Arithmetic Compare
Illegal opcode reset
In order to provide enhanced robustness to the device against unexpected behavior, a
system of illegal opcode detection is implemented: a reset is generated if the code to be
executed does not correspond to any opcode or prebyte value. This, combined with the
Watchdog, allows the detection and recovery from an unexpected fault or interference.
A valid prebyte associated with a valid opcode forming an unauthorized combination does
not generate a reset.
Illegal opcode detection
One Complement
I
Call subroutine
Add with Carry
Absolute Jump
Jump relative
Jump if H = 1
Jump if H = 0
Description
Jump if I = 1
Jump if I = 0
Logical And
Never jump
Decrement
Increment
Bit Reset
Addition
Bit Set
Clear
Halt
Function/Example
btjf Byte, #3, Jmp1
btjt Byte, #3, Jmp1
Pop CC, A, X, PC
A = A + M + C
bres Byte, #3
bset Byte, #3
tst(Reg - M)
A = FFH-A
A = A + M
jp [TBL.w]
tst (A . M)
A = A . M
H = 1 ?
H = 0 ?
N = 1 ?
I = 1 ?
I = 0 ?
dec Y
inc X
jrf *
reg, M
reg, M
reg, M
reg, M
Dst
reg
M
M
M
M
A
A
A
A
Src
M
M
M
M
M
H
H
H
H
0
I
I
Instruction set
N
N
N
N
N
N
N
N
N
N
0
Z
Z
Z
Z
Z
1
Z
Z
Z
Z
Z
189/245
C
C
C
C
C
C
C
1