ST72321AR9-Auto STMicroelectronics, ST72321AR9-Auto Datasheet - Page 82

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ST72321AR9-Auto

Manufacturer Part Number
ST72321AR9-Auto
Description
8-bit MCU for automotive with 60 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72321AR9-Auto

Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt, Wait and Slow
Main clock controller with real-time clock and beeper (MCC/RTC)
11
11.1
11.2
11.3
Caution:
11.4
11.5
82/243
Main clock controller with real-time clock and beeper
(MCC/RTC)
Introduction
The Main Clock Controller consists of three different functions:
Each function can be used independently and simultaneously.
Programmable CPU clock prescaler
The programmable CPU clock prescaler supplies the clock for the ST7 CPU and its internal
peripherals. It manages Slow power saving mode (see
for more details).
The prescaler selects the f
MCCSR register: CP[1:0] and SMS.
Clock-out capability
The clock-out capability is an alternate function of an I/O port pin that outputs a f
drive external devices. It is controlled by the MCO bit in the MCCSR register.
When selected, the clock out pin suspends the clock during Active Halt mode.
Real-time clock timer (RTC)
The counter of the real-time clock timer allows an interrupt to be generated based on an
accurate real-time clock. Four different time bases depending directly on f
The whole functionality is controlled by four bits of the MCCSR register: TB[1:0], OIE and
OIF.
When the RTC interrupt is enabled (OIE bit set), the ST7 enters Active Halt mode when the
HALT instruction is executed. See
more details.
Beeper
The beep function is controlled by the MCCBCR register. It can output three selectable
frequencies on the BEEP pin (I/O port alternate function).
a programmable CPU clock prescaler
a clock-out signal to supply external devices
a real-time clock timer with interrupt capability
CPU
Doc ID 13829 Rev 1
main clock frequency and is controlled by three bits in the
Section 8.4: Active Halt and Halt modes on page 65
Section 8.2: Slow mode on page 62
OSC2
ST72321xx-Auto
are available.
CPU
clock to
for

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