STR912FAZ46 STMicroelectronics, STR912FAZ46 Datasheet - Page 14

• Manufacturer Part Number: STR912FAZ46
• Description: ARM966E-S™ 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA
• Manufacturer: STMicroelectronics

Specifications of STR912FAZ46

• Arm966e-s Risc Core: Harvard architecture, 5-stage pipeline, Tightly-Coupled Memories (SRAM and Flash)

Functional overview
14/102
Figure 1.
To Ethernet
PHY (MII) **
USB Bus
EMI Ctrl
VBATT
VDDQ
4 MHz to
GND
GND
VDD
MHz XTAL
* USB not available on STR910
*** EMI not available on LQFP80
** Ethernet MAC not available on STR910 and STR911
**** Only 40 GPIOs on LQFP80
STR91xFA block diagram
25
STR91xA
CORE SUPPLY, VDD
CORE GND, VSS
I/O SUPPLY, VDDQ
I/O GND, VSSQ
BACKUP
SUPPLY
16
STR91x
RTC
Programmable Vectored
PLL, Power Management,
Programmable Vectored
MAC, 10/100
Interrupt Controllers
and Supervisory Reset
Ethernet**
Endpoints with FIFOs
Muxed Address/Data
USB* Full Speed, 10
Programmable DMA
Interrupt Controller
Interface (EMI)***,
External Memory
Controller (8 ch.)
64K or 96K
Data TCM
Interface
Doc ID 13495 Rev 6
Arbiter
SRAM
Byte
Control Logic / BIU and Write Buffer
Dedicated
AMBA / AHBA Interface
DMA
RISC CPU Core
ARM966E-S
Stacked Burst Flash Memory Die
Main Flash 256K,
512K, 1M or 2M
Request
Ext Req
Timers,
ADC
UART,
AHB
APB
from
SPI,
I2C,
Bytes
32
to
Burst Interface
Burst Interface
Pre-Fetch Que
Instruction
and Branch
JTAG ISP
Interface
Cache
TCM
(3) UART w/ IrDA
8 Channel 10-bit
(4) 16-bit Timers,
Real Time Clock
CAPCOM, PWM
Watchdog Tmr
Motor Control,
3-ph Induction
32K or 128K
(80) GPIO****
CAN 2.0B
2
Wake Up
nd
(2) SPI
(2) I2C
Bytes
Debug
ADC
JTAG
ETM
Flash
and
ETM
48
JTAG
STR91xFAxxx
32.768 kHz
AVDD
AVREF*
AVSS
XTAL