SMM105 SUMMIT Microelectronics, Inc:, SMM105 Datasheet
SMM105
Related parts for SMM105
SMM105 Summary of contents
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... Figure 1 – Applications Schematic using the SMM105 Controller to actively control the DC output level (ADOC DC/DC Converter as well as margin control. The SMM105 can operate over a wide supply range Note: This is an applications example only. Some pins, components and values are not shown. ...
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... Figure 2 – Example Power Supply Margining using the SMM105. The waveform on the left is margin low to high from 1.6V to 2.0V and the waveform on the right is margin high to nominal from 2.0V to 1.8V. The ADOC function guarantees the output level to be within ±0.2% with a ±0.1% external reference. waveform is the READY signal indicating margin is complete. ...
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... CO MP2 O V/ Serial A0 A1 Interface SCL 3.6/5V 12V IN Regulator Supply V DD Arbitration VDD_C AP Figure 3 – SMM105 Controller Internal Block Diagram. PACKAGE AND PIN CONFIGURATION 28 Pin QFN Top View Pin SCL START 3 SMM105 A1 4 READY ...
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... Pin should be left open if using VREF internal VDD Power supply of the part. Ground of the part. The SMM105 ground pin should be connected GND to the ground of the device under control star point ground. PCB layout should take into consideration ground drops. ...
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... Note while monitoring the FAULT# pin state. Base DC Hysteresis is measured with a 1.25V input. Actual )(Base Hysteresis). For example REF 2068 1.8 09/20/05 SMM105 Preliminary Information ° +85 ° (Commercial)............ – + ………..………….…….…TBD Min ...
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... External VREF=1.25V, ±0.1% ADOC trimmed to internal VREF Notes Update period for Active DC Control + 10% change in voltage with 0.1% ripple Fast Margin, nom to high, TRIM_CAP=1PF Slow Margin, nom to high, TRIM_CAP=1PF ADOC/Margining Start time delay after Start pin is enabled 2068 1.8 09/20/05 SMM105 Preliminary Information Min. Typ. Max 1.24 1.25 1.26 0.25 VDD -0.2 +0.2 r 0.1 -0 ...
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... SCL low to valid 0.2 SDA (cycle n) SCL low (cycle n+1) 0.2 to SDA change Note 1/ Note 1/ 250 0 Noise suppression t HIGH t t LOW HD:DAT SU:DAT HD:SDA t DH 2068 1.8 09/20/05 SMM105 Preliminary Information 100kHz 400kHz Typ Max Min Typ Max 100 0 400 1.3 0.6 1.3 0.6 0.6 0.6 3.5 0.2 0.9 0.2 1000 1000 300 300 ...
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... APPLICATIONS INFORMATION DEVICE OPERATION POWER SUPPLY The SMM105 can be powered by either 15V input through the 12VIN pin 2.7V to 5.5V input through the VDD pin (Figure 5). The 12VIN pin feeds an internal programmable regulator that internally generates either 5.5V or 3.6V. The internal regulator must be set to 3.6V if using an 8V supply. A voltage ...
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... Active DC Output Control in order to enable margining. Figure 5 – SMM105 margin example. The nominal setting is 1.8V. The device margins the DC-DC converter from nominal to high, 2.0V then to nominal, then to low, 1.6V. Next it margins to nominal then high and then from high to low and to high again. The READY signals goes low when margining and high when complete. ...
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... SMX3200 I2C Programming Connector 10 pin Header Figure 6 – SMM105 Applications schematic. The accuracy of the external (U4) or internal reference sets the accuracy of the ADOC function. Total accuracy with a ±0.1% external reference is ±0.2% and ±0.5% with the internal reference. The 12V supply can go as low the internal regulator is set to 3.6V. ...
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... Rsrv10 SMX3200 I2C Programming Connector 10 pin Header R1 and R2 need only be placed once on the I2C bus Figure 7 – SMM105 Applications schematic for an adjustable switching regulator (Full regulator circuit not shown). Summit Microelectronics, Inc RTRIM(R3) is calculated as follows: VTRIMlow=0.3V, Regulator VREF=0.8V The current through R3 is ITRIM=(0.8-0.3)/RTRIM (ITRIM)(R4) > ...
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... SDA 2 1 SCL 2 C serial bus connections to program the SMM105. The SMM105 has a 2068 1.8 09/20/05 SMM105 Preliminary Information 2 C serial bus format so that it can be directly An example of the connection This will ensure proper device Pin 10, Reserved Pin 9, 5V Pin 8, Reserved ...
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... Acknowledge clock cycle and then issuing a Stop condition. Refer to Figures 12, 15 and 17 for an illustration of the read sequence. WRITE PROTECTION The SMM105 powers up into a write protected mode. Writing a code to the volatile write protection register (write only) can disable the write protection. The write protection register is located at address 42 to the write protection register is shown in Figure 9 ...
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... I bus protocol. See figure 8 and the SMX3200 Data Sheet. Bus Address Register Type Configuration Registers are located in 00 thru 45 HEX General-Purpose Memory is located in 80 thru FF HEX Table 1 - Address bytes used by the SMM105. 2068 1.8 09/20/05 Preliminary Information HEX HEX SMM105 ...
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... Figure 11 – Configuration Register Page Write 2068 1.8 09/20/05 SMM105 Preliminary Information Data = 55 HEX Unlocks 5 Unlocks HEX HEX General Purpose ...
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... 2068 1.8 09/20/05 SMM105 Preliminary Information Bus Address ...
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... 2068 1.8 09/20/05 SMM105 Preliminary Information Bus Address ...
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... R44 00 Fault Status Bits RC1 The default device ordering number is SMM105NC-160, is programmed as described above and tested over the commercial temperature range. Application Note 38 contains a complete description of the Windows GUI and the default settings of each of the 16 individual Configuration Registers. Summit Microelectronics, Inc 2068 1 ...
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... PACKAGE Summit Microelectronics, Inc 28 Pad QFN 2068 1.8 09/20/05 SMM105 Preliminary Information 19 ...
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... PACKAGE (CONTINUED) Summit Microelectronics, Inc TM 25 Ball Ultra CSP 2068 1.8 09/20/05 SMM105 Preliminary Information 20 ...
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... Hex code, Hex code Blank=Industrial revision, etc. NOTICE Please check the Summit Microelectronics, Inc. web site at PROGRAMMABLE POWER FOR A DIGITAL WORLD™ trademark of Philips Corporation. 2068 1.8 09/20/05 SMM105 Preliminary Information TM 25 Ball Ultra CSP Ball A1 Identifier Summit Part Number 100% Sn, RoHS ...