HT45R37V Holtek Semiconductor Inc., HT45R37V Datasheet - Page 39

• Manufacturer Part Number: HT45R37V
• Description: C/r-f Type 8-bit Otp Mcu
• Manufacturer: Holtek Semiconductor Inc.

A/D Input Pins
All of the A/D analog input pins are pin-shared with the
I/O pins on Port B. Bits PCR2~PCR0 in the ADCR regis-
ter, determine whether the input pins are setup as nor-
mal Port B input/output pins or whether they are setup
as analog inputs. In this way, pins can be changed under
program control to change their function from normal I/O
operation to analog inputs and vice versa. Pull-high re-
sistors, which are setup through register programming,
apply to the input pins only when they are used as nor-
mal I/O pins, if setup as A/D inputs the pull-high resistors
will be automatically disconnected. Note that it is not
necessary to first setup the A/D pin as an input in the
PBC port control register to enable the A/D input as
when the PCR2~PCR0 bits enable an A/D input, the sta-
tus of the port control register will be overridden. The
A/D converter has its own power supply pins AVDD and
AVSS pin. The analog input values must not be allowed
to exceed the value of AVDD.
Initialising the A/D Converter
The internal A/D converter must be initialised in a special
way. Each time the Port B A/D channel selection bits are
modified by the program, the A/D converter must be
re-initialised. If the A/D converter is not initialised after the
channel selection bits are changed, the EOCB flag may
have an undefined value, which may produce a false end
of conversion signal. To initialise the A/D converter after
Rev. 1.00
12MHz
1MHz
2MHz
4MHz
8MHz
f
SYS
ADCS2, ADCS1,
ADCS0=000
(f
500ns*
250ns*
167ns*
SYS
2 s
1 s
/2)
A/D Converter Control Register - ACSR
ADCS2, ADCS1,
A/D Clock Period Examples
ADCS0=001
(f
667ns*
SYS
8 s
4 s
2 s
1 s
/8)
A/D Clock Period (t
39
the channel selection bits have changed, then, within a
time frame of one to ten instruction cycles, the START bit
in the ADCR register must first be set high and then im-
mediately cleared to zero. This will ensure that the EOCB
flag is correctly set to a high condition.
Summary of A/D Conversion Steps
The following summarises the individual steps that
should be executed in order to implement an A/D con-
version process.
Step 1
Select the required A/D conversion clock by correctly
programming bits ADCS2, ADCS1 and ADCS0 in the
register.
Step 2
Enable the A/D by clearing the in the ACSR register to
zero.
Step 3
Select which channel is to be connected to the internal
A/D converter by correctly programming the
ACS2~ACS0 bits which are also contained in the reg-
ister.
Step 4
Select which pins on Port B are to be used as A/D in-
puts and configure them as A/D input pins by correctly
programming the PCR2~PCR0 bits in the ADCR reg-
ister. Note that this step can be combined with Step 2
into a single ADCR register programming operation.
ADCS2, ADCS1,
ADCS0=010
(f
AD
2.67 s
SYS
32 s
16 s
)
8 s
4 s
/32)
ADCS2, ADCS1,
ADCS0=011
Undefined
Undefined
Undefined
Undefined
Undefined
October 20, 2009
HT45R37V