M25PX80 Numonyx, M25PX80 Datasheet - Page 26

• Manufacturer Part Number: M25PX80
• Description: 8-mbit, Dual I/o, 4-kbyte Subsector Erase, Serial Flash Memory With 75 Mhz Spi Bus Interface
• Manufacturer: Numonyx

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the Write Protect (W/V
Protect (W/V
The Write Status Register (WRSR) instruction is not executed once the hardware protected
mode (HPM) is entered.
Figure 11. Write Status Register (WRSR) instruction sequence
Table 8.
1. As defined by the values in the Block Protect (BP2, BP1, BP0) bits of the Status Register, as shown in
The protection features of the device are summarized in
When the Status Register Write Disable (SRWD) bit of the Status Register is 0 (its initial
delivery state), it is possible to write to the Status Register provided that the Write Enable
Latch (WEL) bit has previously been set by a Write Enable (WREN) instruction, regardless
of the whether Write Protect (W/V
W/V
signal
Table
1
0
1
0
PP
3.
S
C
DQ0
DQ1
PP
Protection modes
SRWD
bit
) signal allow the device to be put in the hardware protected mode (HPM).
0
0
1
1
Hardware
protected
protected
Software
PP
(SPM)
(HPM)
Mode
) signal. The Status Register Write Disable (SRWD) bit and Write
0
1
High Impedance
2
Instruction
Status Register is
Writable (if the
WREN instruction
has set the WEL
bit)
The values in the
SRWD, BP2, BP1
and BP0 bits can be
changed
Status Register is
hardware write
protected
The values in the
SRWD, BP2, BP1
and BP0 bits
cannot be changed
Write Protection
PP
3
of the Status
) is driven High or Low.
4
Register
5
6
7
MSB
7
8
6
9 10 11 12 13 14 15
Protected against
Page Program,
Sector Erase and
Bulk Erase
Protected against
Page Program,
Sector Erase and
Bulk Erase
Protected area
5
Register In
4
Table
Status
3
2
8.
Memory content
1
(1)
0
Ready to accept
Page Program and
Sector Erase
instructions
Ready to accept
Page Program and
Sector Erase
instructions
Unprotected area
AI13735
(1)