M25PX80 Numonyx, M25PX80 Datasheet - Page 36

• Manufacturer Part Number: M25PX80
• Description: 8-mbit, Dual I/o, 4-kbyte Subsector Erase, Serial Flash Memory With 75 Mhz Spi Bus Interface
• Manufacturer: Numonyx

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may be read to check the value of the Write In Progress (WIP) bit. The Write In Progress
(WIP) bit is 1 during the self-timed Program OTP cycle, and it is 0 when it is completed. At
some unspecified time before the cycle is complete, the Write Enable Latch (WEL) bit is
reset.
To lock the OTP memory:
Bit 0 of the OTP control byte, that is byte 64, (see
OTP memory array.
Once a bit of the OTP memory has been programmed to ‘0’, it can no longer be set to ‘1’.
Therefore, as soon as bit 0 of byte 64 (control byte) is set to ‘0’, the 64 bytes of the OTP
memory array become read-only in a permanent way.
Any Program OTP (POTP) instruction issued while an Erase, Program or Write cycle is in
progress is rejected without having any effect on the cycle that is in progress.
Figure 19. Program OTP (POTP) instruction sequence
1. A23 to A7 are Don't care.
2. 1 ≤ n ≤ 65
S
C
DQ0
S
C
DQ0
When bits 3, 2, 1, and 0 of byte 64 = ’1’, the 64 bytes of the OTP memory array can be
programmed.
When bits 3, 2, 1, and 0 of byte 64 = ‘0’, the 64 bytes of the OTP memory array are
read-only and cannot be programmed anymore.
MSB
7
40
0
6
41
1
5
42
Data byte 2
2
Instruction
4
43 44 45 46 47 48 49 50
3
3
4
2
5
1
6
0
MSB
7
7
MSB
23
8
6
22 21
9 10
5
Data byte 3
24-bit address
4
51
3
52 53 54 55
3
28 29 30 31 32 33 34 35
2
Figure
2
1
1
0
0
20) is used to permanently lock the
MSB
7
MSB
7
6
6
5
Data byte 1
5
Data byte n
4
4
3
36 37 38
3
2
2
1
1
0
39
0
AI13575