T7256 Agere Systems, T7256 Datasheet - Page 40

• Manufacturer Part Number: T7256
• Description: (T7234 - T7256) Compliance
• Manufacturer: Agere Systems

T7234 Single-Chip NT1 (SCNT1) Euro-LITE Transceiver
Questions and Answers
U-Interface
Q27: What is the value of the ANSI T1.601 cso and nib
A27: cso and nib are fixed at 0 and 1, respectively, by
Q28: It looks like the U-interface sai and act bits that
A28: The sai bit is equal to 1 when there is activity
36
bits in the 2B1Q frame?
the device. This is because the device always has
warm start capability (CSO = 0), and NT1s are
required to have nib = 1 per T1.601-1992.
the T7234 transmits towards the LT always track
one another. If this is the case, I don’t understand
why they are both needed. Can you explain the
purpose of the sai bit and how it relates to the act
bit?
(INFO 1 or INFO 3) on the S/T-interface. The act
bit is 1 whenever layer 1 transparency is estab-
lished. Most of the time these bits are the same,
but there are two situations where they will be dif-
ferent.
1. The sai bit can be used in conjunction with the
uoa bit from the LT to support DSL-only activa-
tion as described in the ANSI and ETSI stan-
dards. The LT can request a U-only activation
by setting uoa = 0, which will cause the S/T-
interface to remain in a deactivated state. If the
TE requests an activation under these condi-
tions by transmitting INFO 1 to the T7234, the
sai bit will change from 0 to 1, indicating to the
LT that there is activity on the S/T-interface so
that the LT can respond accordingly. Typically,
this means that LT will set uoa = 1 to exit the
DSL-only condition so that layer-1 transparen-
cy can be established from TE to LT. Thus, in
the case of a DSL-only activation, the T7234's
sai bit is 1 and its act bit is 0 from the time a TE
requests an activation until the following
events occur:
A.
B.
C.
D.
LT sets uoa = 1 towards the NT.
The T7234 detects uoa = 1 and transmits
INFO 2 on the S/T-interface.
The TE synchronizes and transmits INFO
3 on the S/T-interface.
Upon reception of the INFO 3 signal, the
T7234 sets act = 1.
(continued)
(continued)
S/T-Interface
Q29: What is the S/T transformer’s inductance?
A29: For Lucent transformers 2768A or 2776, a mini-
Q30: Can the S/T-interface leads be short-circuited
A30: Yes, this will not cause any harm to the device.
Q31: What is the common-mode rejection of the S/T
A31: The common-mode rejection of the S/T receiver
mum inductance of 22 mH is guaranteed.
together without harming the device?
receiver?
is 400 mV. Refer to the Electrical Characteristics
described in the data sheet.
2. If a link is fully active, then the LT detects a
transition of the NT act bit from 1 to 0, it is an
indication of loss of layer-1 transparency. This
can be caused by either (a) S/T loss of sync or
(b) NT1 received INFO 0. Case (a) will result in
an act = 0/sai = 1 combination, i.e., S/T sync is
lost but there is still activity on the S/T-inter-
face, meaning the TE is having trouble staying
synchronized. Case (b) will result in an act = 0/
sai = 0 combination, i.e., no activity on the S/T-
interface (INFO 0), meaning the TE has been
disconnected (there is no way the TE can le-
gally send INFO 0 when the link is fully active
because the TE is not allowed to initiate deac-
tivation—only the LT is—so the only other pos-
sibility is that it has been disconnected or has
failed). Note that this procedure allows the CO
to determine whether the cause of loss of
layer-1 transparency is a TE that is having syn-
chronization problems or a TE that has been
disconnected, based on the state of the sai bit
when act = 0.
The ANSI T1.601 and ETSI ETR 080 stan-
dards contain finite state matrices that de-
scribe DSL-only operation. The T7234 follows
the behavior described in the matrices. Refer
to those tables for detailed information on each
of the states.
Lucent Technologies Inc.
February 1998