ACS8530T Semtech Corporation, ACS8530T Datasheet - Page 115

• Manufacturer Part Number: ACS8530T
• Description: Synchronous Equipment Timing Source for Stratum 2/3E Systems
• Manufacturer: Semtech Corporation

Address (hex):
Address (hex):
Revision 3.02/November 2005 © Semtech Corp.
ADVANCED COMMUNICATIONS
Register Name
Register Name
Bit No.
Bit No.
Bit 7
[7:2]
[1:0]
Bit 7
[7:5]
[4:0]
66
67
cnfg_T4_DPLL_bw
Description
Not used.
T4_DPLL_bandwidth
Register to configure the bandwidth of the T4 DPLL.
cnfg_T0_DPLL_locked_bw
Description
Not used.
T0_DPLL_locked_bandwidth
Register to configure the bandwidth of the T0 DPLL
when locked to an input reference. Reg. 3B Bit 7 is
used to control whether this bandwidth is used all of
the time or automatically switched to when phase
locked.
Bit 6
Bit 6
Bit 5
Bit 5
Description
Description
Bit 4
Bit 4
FINAL
Page 115
(R/W) Register to configure the
bandwidth of the T4 DPLL.
(R/W) Register to configure the
bandwidth of the T0 DPLL, when
phase locked to an input.
10010-11111
Bit Value
Bit Value
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
Bit 3
Bit 3
00
01
10
11
-
-
T0_DPLL_locked_bandwidth
Value Description
-
T4 DPLL 18 Hz bandwidth.
T4 DPLL 35 Hz bandwidth.
T4 DPLL 70 Hz bandwidth.
Not used.
Value Description
-
T0 DPLL 0.5 mHz locked bandwidth.
T0 DPLL 1 mHz locked bandwidth.
T0 DPLL 2 mHz locked bandwidth.
T0 DPLL 4 mHz locked bandwidth.
T0 DPLL 8 mHz locked bandwidth.
T0 DPLL 15 mHz locked bandwidth.
T0 DPLL 30 mHz locked bandwidth.
T0 DPLL 60 mHz locked bandwidth.
T0 DPLL 0.1 Hz locked bandwidth.
T0 DPLL 0.3 Hz locked bandwidth.
T0 DPLL 0.6 Hz locked bandwidth.
T0 DPLL 1.2 Hz locked bandwidth.
T0 DPLL 2.5 Hz locked bandwidth.
T0 DPLL 4 Hz locked bandwidth.
T0 DPLL 8 Hz locked bandwidth.
T0 DPLL 18 Hz locked bandwidth.
T0 DPLL 35 Hz locked bandwidth.
T0 DPLL 70 Hz locked bandwidth.
Not used.
Bit 2
Bit 2
Default Value
Default Value
ACS8530 SETS
Bit 1
Bit 1
T4_DPLL_bandwidth
DATASHEET
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0000 0000
0000 1011
Bit 0
Bit 0