AD9244-EVAL Analog Devices, AD9244-EVAL Datasheet - Page 15

• Manufacturer Part Number: AD9244-EVAL
• Description: 14-Bit/ 40/65 MSPS Monolithic A/D Converter
• Manufacturer: Analog Devices

For noise sensitive applications, the very high bandwidth
of the AD9244 may be detrimental and the addition of a
series resistor and/or shunt capacitor can help limit the
wideband noise at the ADC’s input by forming a low pass
filter. The source impedance driving VIN+ and VIN-
should be matched. Failure to provide matching may re-
sult in degradation of the SNR, THD, or SFDR of the
AD9244.
ANALOG INPUT AND REFERENCE OVERVIEW
The differential input span of the AD9244 is equal to the
potential at the VREF pin. The VREF potential may be
obtained from the internal AD9244 reference or an exter-
nal source.
In differential applications, the center point of the input
span is obtained by the common mode level of the signals.
In single ended applications, the center point is the dc
potential applied to one input pin while the signal is ap-
plied to the opposite input pin.
Figure 4 is a simplified model of the AD9244 analog in-
put, showing the relationship between the analog inputs,
VIN+, VIN-, and the reference voltage, VREF. Note that
this is only a symbolic model and that no actual negative
voltages exist inside the AD9244. Similar to the voltages
applied to the top and bottom of the resistor ladder in a
flash ADC, the value VREF/2 defines the minimum and
maximum input voltages to the ADC core.
Input
Connection
Single-Ended
Differential
(via Transformer)
or Amplifier
NOTE
1
Reference
Operating Mode
INTERNAL
INTERNAL
INTERNAL
EXTERNAL
REV. PrD 01/22/02
VIN+ and VIN- can be interchanged if signal inversion is required.
Coupling Span (V)
DC or AC 1.0
DC or AC 1.0
Input Span (VIN+–VIN-)
(V p-p)
1
2
1
(SPAN=VREF)
SPAN=EXTERNAL REF
Input
2.0
2.0
SPAN
PRELIMINARY TECHNICAL DATA
VIN+
0.5 to 1.5
1 to 3
2.25 to 2.75
2.0 to 3.0
2
Input Range (V)
1
Table I. Analog Input Configuration Summary
Table II. Reference Configuration Summary
VIN-
1.0
2.0
2.75 to 2.25
3.0 to 2.0
1
Required VREF (V)
1
2
1
VREF = (1 + R1/R2)
1
VREF
VREF
–15–
Comments
Best for stepped input response applications, requires ±5 V op amp.
Optimum noise performance for single ended mode, often
requires low distortion op amp with VCC > +5 V due to its head-
room issues.
the ADC’s Nyquist frequency. Preferred mode for undersampling
applications.
Optimum noise performance for differential mode.
Optimum full-scale THD and SFDR performance well beyond
The addition of a differential input structure allows the
user to easily configure the inputs for either single-ended
or differential operation. The ADC’s input structure al-
lows the dc offset of the input signal to be varied indepen-
dently of the input span of the converter. Specifically, the
input to the ADC core can be defined as the difference of
the voltages applied at the VIN+ and VIN- input pins.
Therefore, the equation
defines the output of the differential input stage and pro-
vides the input to the ADC core.
The voltage, V
where VREF is the voltage at the VREF pin.
Figure 4. Equivalent Analog Input of AD9244
–VREF/2 < V
2.0
2.0
VIN+
VIN-
+
-
V
CORE
CORE
AD9244
Connect
REFSENSE
REFSENSE
R1
R2
REFSENSE
VREF
CORE
, must satisfy the condition,
= VIN+ – VIN-
V CORE
< VREF/2
CORE
ADC
+VREF/2
-VREF/2
AVDD
T o
VREF
AGND
VREF AND REFSENSE
REFSENSE AND REFGND
EXTERNAL REF
AD9244
14
(1)
(2)