MT92210 Zarlink Semiconductor, MT92210 Datasheet - Page 13

• Manufacturer Part Number: MT92210
• Description: 1023 Channel Voice Over ip (VoIP) Processor
• Manufacturer: Zarlink Semiconductor

Data Sheet
1.0
The MT92210 device supports the following features:
1.1
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1.3
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Up to 1023 full-duplex PCM or ADPCM voice channels over IP/UDP/RTP connections
Up to 4096 HDLC channels carrying application data (UDP payload) converted to IP/UDP connections
Simultaneous support of PCM, ADPCM and HDLC connections
16-bit Intel/Motorola CPU Interface
Fully H.110 compliant TDM interface
Network Interface A: UTOPIA Level 1/2, POS-PHY Level 2 or MII
Network Interface B: UTOPIA Level 1
Full chip capacity can be achieved with two 18 bit data bus ZBT SSRAM, each ranging in size from 128K to
1M bytes; one 36 bit data bus ZBT SSRAM, ranging in size from 128K to 1M bytes; and two 16 bit data bus
SDRAM, each ranging in size from 8M to 16M bytes
Simultaneous support of IP version 4 and 6
Chip packages voice in RTP, UDP, and IP to support RFC791, RFC2460, RFC768, and RFC1889
IP packets can be sent over 3 different types of physical links (Ethernet, ATM, Packet over SONET)
RTP packaging is optional per connection
HDLC mini-packets are encapsulated in IP and UDP (RTP packaging performed by external agent)
IP/UDP layers are optional and can be eliminated to reduce overhead (i.e., null encapsulation) in either ATM
AAL5 or Ethernet (using custom EtherType)
IP over AAL5 can be performed using Classical IP over ATM with SNAP/LLC headers or Ethernet LAN
Emulation (LANE) v1 or v2
Support of MPLS. On reception, MPLS label can be used to establish data format following it, as well as
logical subnet number and quality of service. MPLS multicast can be treated as unicast or routed to software
Support of MPOA. On reception, MPOA tag can be used to establish data format following it, as well as
logical subnet number and quality of service
Logical subnet number can be established using ATM header, MPLS flow header, MPOA tag or ELAN-ID in
LANE v2 header
Quality of service can be determined using ATM header, Ethernet user priority or IP Type Of Service (TOS)
Up to 1023 PCM/ADPCM channels
Support for up to 4096 HDLC channels distributed over 512 streams and 2046 time slots
Up to 255 PCM/ADPCM channels per connection
HDLC packets contain application data (UDP payload) converted to IP/UDP datagram
Packets sizes up to 1500 bytes for IP/UDP
Support of up to 1500 TDM samples of data per packet
Jitter Absorption Buffer size up to 4096 bytes allowing absorption of up to ±256 ms of PDV
Injection of CPU-generated RTP packets
Reception of CPU-destined RTP packets in buffers of up to 64K bytes
Packet Delay Variation monitoring to diagnose and reduce delay
Packet loss & misinsertion compensation for PCM and ADPCM packets
Network jitter monitoring allows support of RTCP for PCM, ADPCM, HDLC and CPU connections
Policing on HDLC channels and CPU channels protects against misbehaving connections
PCM, ADPCM, HDLC and CPU mini-packets can all be transported on the same connection with chip's RTP
engine to guarantee consistency among the packets
In the disassembly module, synchronization deltas allow multiple independent connections to be
Features
General Features
Data Formats
Voice Treatment Functions
Zarlink Semiconductor Inc.
MT92210
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