MT92210 Zarlink Semiconductor, MT92210 Datasheet - Page 66

• Manufacturer Part Number: MT92210
• Description: 1023 Channel Voice Over ip (VoIP) Processor
• Manufacturer: Zarlink Semiconductor

66
7.2
When events indicating the assembly of RTP packets are read and treated by the service timer, they are written
into a packet assembly queue to be treated in order. HDLC packets that complete also generate events in this
packet assembly queue independently of the service timer.
The CPU can also generate packets to be inserted in an active connection. To do so, it writes the packets' payload
in external memory (including the RTP header if any), and writes a descriptor to registers. This descriptor is then
inserted into the event queue and treated by the chip. By inserting packets into an active connection instead of
constructing the packets entirely itself, it allows the chip to manage the consistency of the RTP header across
packets. For example, the sequence number will be incremental across all packets on an IP/RTP connection, not
just on voice packets generated by the chip.
Serv Timer #
ST:
Assembly
Structure Base
Address [20:6]
Field
Event Queue
Service Timer number
Start Channel. A channel will only power-up on an event that has this bit set to ‘1’.
Base address of the Tx RTP Connection Structure to which this event is being sent. The
base address is pointed to in increments of 64 bytes.
+(N-3)*10h
+(N-2)*10h
+(N-1)*10h
+10
+20
Figure 34 - Assembly Event Queue
+0
N = {1024, 2048, 4096}
Start/Cross Boundary = {16K, 32K, 64K} bytes
Zarlink Semiconductor Inc.
Assembly Event N-3
Assembly Event N-2
Assembly Event N-1
Assembly Event 0
Assembly Event 2
Assembly Event 1
Description