PIC16C620 Microchip Technology, PIC16C620 Datasheet - Page 20

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PIC16C620

Manufacturer Part Number
PIC16C620
Description
EPROM-Based 8-Bit CMOS Microcontroller
Manufacturer
Microchip Technology
Datasheet

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PIC16C62X
4.2.2.3
The INTCON register is a readable and writable
register which contains the various enable and flag bits
for all interrupt sources except the comparator module.
See
description of the comparator enable and flag bits.
FIGURE 4-10: INTCON REGISTER (ADDRESS 0BH OR 8BH)
DS30235G-page 20
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
R/W-0
GIE
Section 4.2.2.4
INTCON REGISTER
GIE: Global Interrupt Enable bit
1 = Enables all un-masked interrupts
0 = Disables all interrupts
PEIE: Peripheral Interrupt Enable bit
1 = Enables all un-masked peripheral interrupts
0 = Disables all peripheral interrupts
T0IE: TMR0 Overflow Interrupt Enable bit
1 = Enables the TMR0 interrupt
0 = Disables the TMR0 interrupt
INTE: RB0/INT External Interrupt Enable bit
1 = Enables the RB0/INT external interrupt
0 = Disables the RB0/INT external interrupt
RBIE: RB Port Change Interrupt Enable bit
1 = Enables the RB port change interrupt
0 = Disables the RB port change interrupt
T0IF: TMR0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed (must be cleared in software)
0 = TMR0 register did not overflow
INTF: RB0/INT External Interrupt Flag bit
1 = The RB0/INT external interrupt occurred (must be cleared in software)
0 = The RB0/INT external interrupt did not occur
RBIF: RB Port Change Interrupt Flag bit
1 = When at least one of the RB7:RB4 pins changed state (must be cleared in software)
0 = None of the RB7:RB4 pins have changed state
R/W-0
PEIE
R/W-0
and
T0IE
Section 4.2.2.5
R/W-0
INTE
R/W-0
RBIE
for
Preliminary
a
R/W-0
T0IF
R/W-0
INTF
Note:
Interrupt flag bits get set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>).
R/W-x
RBIF
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
-x = Unknown at POR reset
1998 Microchip Technology Inc.
read as ‘0’

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