MX28F640C3T Macronix International, MX28F640C3T Datasheet - Page 15

• Manufacturer Part Number: MX28F640C3T
• Description: 64M-BIT [4M x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
• Manufacturer: Macronix International

4.5 Sector Erase Command
Erase is executed one sector at a time and initiated by a
two-cycle command. A sector erase setup is first writ-
ten (20H), followed by a sector erase confirm (D0H). This
command sequence requires appropriate sequencing and
an address within the sector to be erased. Sector pre-
conditioning, erase, and verify are handled internally by
the WSM. After the two-cycle sector erase sequence is
written, the device automatically outputs status register
data when read (see Figure 8). The CPU can detect sec-
tor erase completion by analyzing the output data of the
status register bit SR.7.
When the sector erase is complete, status register bit
SR.5 should be checked. If a sector erase error is de-
tected, the status register should be cleared before sys-
tem software attempts corrective actions. The CUI re-
mains in read status register mode until a new com-
mand is issued.
This two-step command sequence of set-up followed by
execution ensures that sector contents are not acciden-
tally erased. An invalid sector Erase command sequence
will result in both status register bits SR.4 and SR.5
being set to "1". Also, reliable sector erasure can only
occur when 2.7V~3.6V and VPP=VPPH1/2. In the ab-
sence of this high voltage, sector contents are protected
against erasure. If sector erase is attempted while
VPP<VPPLK SR.3 and SR.5 will be set to "1". To suc-
cessfully erase the boot sector, the corresponding sec-
tor lock-bit must be clear first. In parameter and sectors
case, it must be cleared the corresponding sector lock-
bit. If sector erase is attempted when the excepting
above sector being locked conditions, SR.1 and SR.5
will be set to "1". Sector erase is not functional.
4.6 Word Write Command
Word write is executed by a two-cycle command se-
quence. Word write setup (standard 40H or alternate 10H)
is written, followed by a second write that specifies the
address and data. The WSM then takes over, controlling
the word write and write verify algorithms internally. Af-
ter the word write sequence is written, the device auto-
matically outputs status register data when read (see
Figure 6). The CPU can detect the completion of the
word write event by analyzing the status register bit SR.7.
When word write is complete, status register bit SR.4
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should be checked. If word write error is detected, the
status register should be cleared. The internal WSM verify
only detects errors for "1"s that do not successfully write
to "0"s. The CUI remains in read status register mode
until it receives another command.
Reliable word writes can only occur when
VCC=2.7V~3.6V and VPP=VPPH1/2. In the absence of
this high voltage, memory contents are protected against
word writes. If word write is attempted while
VPP<VPPLK, status register bits SR.3 and SR.4 will be
set to "1". Successful word write requires for boot sector
that WP is VIH the corresponding sector lock-bit be
cleared. In parameter and main sectors case, it must be
cleared the corresponding sector lock-bit. If word write
is attempted when the excepting above sector being
clocked conditions, SR.1 and SR.4 will be set to "1".
Word write is not functional.
4.7 Sector Erase Suspend Command
The Sector Erase Suspend command (50H) allows sec-
tor-erase interruption to read or word write data in an-
other sector of memory. Once the sector erase process
starts, writing the Sector Erase Suspend command re-
quests that the WSM suspend the sector erase sequence
at a predetermined point in the algorithm. The device
outputs status register data when read after the Sector
Erase Suspend command is written. Polling status reg-
ister bits SR.7 and SR.6 can determine when the sector
erase operation has been suspended (both will be set to
"1"). Specification tWHR12 defines the sector erase sus-
pend latency.
When Sector Erase Suspend command write to the CUI,
if sector erase was finished, the device places read ar-
ray mode. Therefore, after Sector Erase Suspend com-
mand write to the CUI, Read Status Register command
(70H) has to write to CUI, then status register bit SR.6
should be checked for placing the device in suspend
mode.
At this point, a Read Array command can be written to
read data from sectors other than that which is sus-
pended. A Word Write commands sequence can also be
issued during erase suspend to program data in other
sectors. Using the Word Write Suspend command (see
Section 4.9), a word write operation can also be sus-
pended. During a word write operation with sector erase
suspended, status register bit SR.7 will return to "0".
MX28F640C3T/B
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REV. 0.6, AUG. 20, 2003