st10f269z1 STMicroelectronics, st10f269z1 Datasheet - Page 42

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st10f269z1

Manufacturer Part Number
st10f269z1
Description
St10f269 16-bit Mcu With Mac Unit, 256k Byte Flash Memory And 12k Byte Ram
Manufacturer
STMicroelectronics
Datasheet

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6 - CENTRAL PROCESSING UNIT (CPU)
The Table 5 shows the various combinations of pointer post-modification for each of these 2 new address-
ing modes. In this document the symbols “[Rw
Table 5 : Pointer Post-modification Combinations for IDXi and Rwn
Table 6 : MAC Registers Referenced as ‘CoReg‘
42/184
“[IDX
“[Rw
MSW
MAH
MAS
MAL
MCW
MRW
n
i
Registers
]” stands for
]” stands for
Symbol
MAC-Unit Status Word
MAC-Unit Accumulator High
“limited” MAH /signed
MAC-Unit Accumulator Low
MAC-Unit Control Word
MAC-Unit Repeat Word
[IDX
[IDX
[IDX
[IDX
[IDX
[Rwn]
[Rwn ]
[Rwn-]
[Rwn
[Rwn - QR
Mnemonic
i
i
i
i
i
]
-]
- QX
]
QX
QR
j
j
j
]
j
]
]
]
Description
n
(IDX
(IDX
(IDX
(IDX
(IDX
(Rwn)
(Rwn)
(Rwn)
(Rwn)
(Rwn)
]” and “[IDX
i
i
i
i
i
)
)
)
)
)
(IDX
(IDX
(IDX
(IDX
(IDX
(Rwn)
(Rwn) + 2
(Rwn) - 2
(Rwn) + (QR
(Rwn) - (QR
i
i
i
i
i
i
)
) + 2
) - 2
) + (QX
) - (QX
]” refer to these addressing modes.
Address Pointer Operation
j
j
j
)
j
)
)
)
(no-op)
(i=0,1)
(i=0,1)
(no-op)
(i, j =0,1)
(i, j =0,1)
(n=0-15)
(n=0-15)
Address in Opcode
(n=0-15; j =0,1)
(n=0-15; j =0,1)
00000b
00001b
00010b
00100b
00101b
00110b
ST10F269

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