st10f269z1 STMicroelectronics, st10f269z1 Datasheet - Page 95
st10f269z1
Manufacturer Part Number
st10f269z1
Description
St10f269 16-bit Mcu With Mac Unit, 256k Byte Flash Memory And 12k Byte Ram
Manufacturer
STMicroelectronics
Datasheet
1.ST10F269Z1.pdf
(184 pages)
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ST10F269
14 - SERIAL CHANNELS
Serial communication with other microcontrollers,
microprocessors, terminals or external peripheral
components is provided by two serial interfaces:
the asynchronous / synchronous serial channel
(ASCO) and the high-speed synchronous serial
channel
generators set up all standard Baud rates without
the
transmission, reception and erroneous reception,
3 separate interrupt vectors are provided for each
serial channel.
14.1 - Asynchronous / Synchronous Serial
Interface (ASCO)
The asynchronous / synchronous serial interface
(ASCO) provides serial communication between
the
microprocessors or external peripherals.
A set of registers is used to configure and to
control the ASCO serial interface:
Figure 44 : Asynchronous Mode of Serial Channel ASC0
RXD0/P3.11
Pin
Input
CPU
Clock
ST10F269
requirement
0
1
(SSC).
MUX
S0R
and
Two
of
Sampling
oscillator
other
dedicated
S0REN
S0FEN
S0PEN
S0OEN
S0LB
2
microcontrollers,
tuning.
Register S0RBUF
Baud
Receive Buffer
Receive Shift
Baud Rate Timer
S0M S0STP
Reload Register
Register
rate
For
Serial Port Control
Internal Bus
Shift Clock
Clock
– P3, DP3, ODP3 for pin configuration
– SOBG for Baud rate generator
– SOTBUF for transmit buffer
– SOTIC for transmit interrupt control
– SOTBIC for transmit buffer interrupt control
– SOCON for control
– SORBUF for receive buffer (read only)
– SORIC for receive interrupt control
– SOEIC for error interrupt control
14.1.1 - ASCO in Asynchronous Mode
In asynchronous mode, 8 or 9-bit data transfer,
parity generation and the number of stop bit can
be selected. Parity framing and overrun error
detection is provided to increase the reliability of
data transfers. Transmission and reception of data
is double-buffered. Full-duplex communication up
to 1.25M Bauds (at 40MHz f
devices) and up to 1MBaud (at 32MHz f
TQFP144 devices) is supported in this mode.
S0FE
Register S0TBUF
Transmit Buffer
Transmit Shift
S0PE
Register
16
S0OE
14 - SERIAL CHANNELS
S0RIR
S0EIR
S0TIR
TXD0 / P3.10
Output
Pin
CPU
Receive Interrupt
Request
Transmit Interrupt
Request
Error Interrupt
Request
on PQFP144
CPU
95/184
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