dsp56004 Freescale Semiconductor, Inc, dsp56004 Datasheet - Page 19

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dsp56004

Manufacturer Part Number
dsp56004
Description
Symphonytm Audio Dsp Family 24-bit Digital Signal Processors
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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SERIAL AUDIO INTERFACE (SAI)
SAI Receiver Section
MOTOROLA
SDI0
SDI1
SCKR
Signal
Name
The SAI is composed of separate receiver and transmitter sections.
Input or
Output
Signal
Input
Input
Type
Table 1-9 Serial Audio Interface (SAI) Receiver signals
Freescale Semiconductor, Inc.
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State during
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Tri-stated
Tri-stated
Tri-stated
Reset
DSP56004/D, Rev. 3
Serial Data Input 0—While in the high impedance
state, the internal input buffer is disconnected from
the pin and no external pull-up is necessary. SDI0 is
the serial data input for receiver 0.
Note:
Serial Data Input 1—While in the high impedance
state, the internal input buffer is disconnected from
the pin and no external pull-up is necessary. SDI1 is
the serial data input for receiver 1.
Note:
Receive Serial Clock—SCKR is an output if the
receiver section is programmed as a master, and a
Schmitt-trigger input if programmed as a slave. While
in the high impedance state, the internal input buffer
is disconnected from the pin and no external pull-up is
necessary.
Note:
This signal is high impedance during hardware or
software reset, while receiver 0 is disabled
(R0EN = 0), or while the DSP is in the Stop state.
This signal is high impedance during hardware or
software reset, while receiver 1 is disabled
(R1EN = 0), or while the DSP is in the Stop state.
SCKR is high impedance if all receivers are
disabled (individual reset) and during hardware or
software reset, or while the DSP is in the Stop state.
Signal Description
Signal/Connection Descriptions
Serial Audio Interface (SAI)
1-13

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