isp1160 NXP Semiconductors, isp1160 Datasheet - Page 60

• Manufacturer Part Number: isp1160
• Description: Isp1160 Embedded Universal Serial Bus Host Controller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 42:
9397 750 13963
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Hc PInterrupt register: bit allocation
reserved
R/W
R/W
15
0
7
0
ClkReady
After this register (24H to read) is read, the bits that are active will not be reset, until
logic 1 is written to the bits in this register (A4H to write) to clear it. To clear all the
enabled bits in this register, the HCD must write FFH to this register.
Code (Hex): 24 — read
Code (Hex): A4 — write
Table 43:
Bit
15 to 7
6
5
4
3
R/W
R/W
14
0
6
0
Hc PInterrupt register: bit description
Suspended
Symbol
-
ClkReady
HC
Suspended
OPR_Reg
-
R/W
R/W
HC
13
0
5
0
Rev. 05 — 24 December 2004
OPR_Reg
Description
reserved
0 — no event
1 — clock is ready. After a wake-up is sent, there is a wait for clock
ready. Maximum is 1 ms, and typical is 160 s.
0 — no event
1 — the HC has been suspended and no USB activity is sent from
the microprocessor for each ms. When the microprocessor wants
to suspend the HC, the microprocessor must write to the
HcControl register. And when all downstream devices are
suspended, then the HC stops sending SOF; the HC is suspended
by having the HcControl register written into.
0 — no event
1 — there are interrupts from HC side. Need to read HcControl
and HcInterrupt registers to detect type of interrupt on the HC (if
the HC requires the operational register to be updated).
reserved
R/W
R/W
12
0
4
0
reserved
reserved
R/W
R/W
11
0
3
0
Interrupt
AIIEOT
Embedded USB Host Controller
R/W
R/W
10
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ATLInt
R/W
R/W
9
0
1
0
ISP1160
SOFITLInt
R/W
R/W
8
0
0
0
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